Deeds: One-Stop Solution for All Your Digital Electronics Design Needs

0
286

Deeds, short for ‘Digital Electronics Education and Design Suite,’ is a set of educational tools for digital Electronics that adopt learn-by-doing approach. Developed by the University of Genoa, Italy. We hope you find it as useful as we did

EFY Bureau


Deeds was conceived by the University of Genoa, Italy, as a suite of simulators, tools and learning material for digital electronics design. It helps students acquire theoretical foundations, analysis and problem solving capabilities all over the design electronics domain, and practical synthesis and design skills. Its approach is characterised by the mantra of “learning-by-doing.”

Deeds covers the following areas of digital electronics:

1. Combinational logic networks ranging from simple gates to decoders, encoders, multiplexers and demultiplexers

Explore Circuits and Projects Explore Videos and Tutorials

2. Sequential logic networks from a simple flip-flop to the slightly less simple registers and counters

3. Finite-state machine design and microcomputer programming (at Assembly level) along with micro-computer interfacing

4. Field-programmable gate array programming

Fig. 1: Assistant browser is opened, showing a page with a problem assignment
Fig. 1: Assistant browser is opened, showing a page with a problem assignment

Tools and features

Simulators are integrated around two HTML browsers: an HTML main browser to navigate on the Internet, where students can find lessons, exercises and laboratory assignments, and an assistant browser, which assists students in their work. These browsers allow you to launch all the tools and also interact with them. Hence the browsers can now control editors and simulators, and realise a true interaction between theory and practical results. The main Web browser of Deeds, when activated, shows an HTML page that allows you to connect to the Deeds website and to the ‘online’ learning material developed at DIBE (University of Genoa).

51D_2
Fig. 2: An example of a circuit based on the microcomputer component

The main browser has been developed around the standard Microsoft WebBrowser component extended to support all the functions required by the Deeds environment. It is mainly used to connect to the sites containing the learning material. The browser supports all the features that the user can expect to find, including JAVA Virtual Machine, VBScript, JavaScript and XML support.

The assistant HTML browser has characteristics similar to those of the main browser but it is customised to assist students in their work. This browser is used to open lessons, exercises and laboratory assignments. Similar to the main browser, the assistant browser has been conceived around the standard Microsoft WebBrowser component. All the objects visualised on a webpage can be made ‘active.’

There is a schematic digital circuit editor in addition to a component datasheet support. The software houses an interactive circuit animator (to experiment with components and simple networks directly on the schematics), an interactive logic simulator (with a timing diagram tracer to analyse events in the logic networks and to interact step-by-step with the circuit) and a finite-state machine editor/simulator (the algorithm for which is described using the ASM graphical editor). It also contains a microcomputer board emulator (the board includes an 8-bit CPU, ROM, RAM and the requisite input/output ports) and an assembler/interactive debugger module. The schematic editor lets you connect traditional logic circuits with sub-systems with the help of a finite-state machine editor and a microcomputer emulator. Hence it is possible to experiment with systems controlled by state machines and microcomputers with port interfacing and low-level programming of embedded systems.

READ
Signal Processing in C++ Using Aquila 3.0
A16_E1B_3
Fig. 3: View of the ‘Test on FPGA’ expert window, one of the new tools

Digital circuit simulator d-DcS appears to the user as a graphical schematic editor with a library of simplified logic components customised to pedagogical needs and not describing specific commercial products. As mentioned earlier, the schematic editor allows you to build simple digital networks composed of gates, flip-flops, predefined combinational and sequential circuits, and custom-defined components, which are defined as finite-state machines. Simulation can be interactive or in timing-mode.

In interactive mode, the student can animate the digital system in the editor, thereby controlling its inputs and observing results. This is the simplest way to examine a digital network and hence highly useful for beginners.

In timing mode, the behaviour of the circuit can be analysed by a timing diagram window, in which the user can define graphically an input signal sequence and observe the simulation results. This mode is analogous to professional simulation.

Finite-state machine simulator d-FsM allows graphical editing and simulation of finite-state machine components using the algorithmic state machine paradigm. The tool allows local functional simulation of finite-state machines, which is user-designed with runtime display of relationships between state and timing evolution. Components produced by d-FsM can be directly used in d-DcS and inserted into any digital circuit. These can also be exported in VHDL language. A general-purpose finite-state machine software simulator helps students to enhance their design skills and also facilitates transition from pedagogical to professional field by introducing CAD methodologies.

F3E_4
Fig. 4: The Assembly code debugger

In addition, the latest edition of the software offers users a new VHDL converter (to export projects to other design environment tools) along with an FPGA ‘expert’ module to export and test projects on FPGA boards. The FPGA extension introduces FPGA-based systems for practice of digital design. New commands allow compilation of a project onto an FPGA chip by exporting it in VHDL to an FPGA-specific EDA tool. (The best part is that beginners to this concept can also utilise this feature as it doesn’t require knowledge of VHDL language.)

READ
Simulate Your PIC Microcontroller Using gpsim

With micro-computer emulator d-McE, users can practise programming at Assembly language level. It functionally emulates a board including a CPU, ROM and RAM, parallel I/O ports, reset circuitry and a simple interrupt logic. The custom 8-bit CPU, named DMC8, is designed to suite your educational needs, and is based on a simplified version of the well-known Z80-CPU processor. The integrated source code editor enables users to enter Assembly programs, which can be assembled, linked and loaded in the emulated system memory with a simple command. The programs can be executed step by step in the interactive debugger. In the debugger, as in professional tools, the user can evaluate the contents of all the structures involved in the hardware/software system by stepping the execution of programs.

Applications of the software
Deeds was conceived as a learning environment for students interested in digital electronics. As such, it may contain different technical subjects and different pedagogical formats (lectures, exercises, lab assignments, etc) delivered at different student levels. Deeds can therefore be classified as a set of tools that teachers can complete and personalise to suit their pedagogical needs by contributing to the lecture space with their own material. A major selling point is that teachers don’t need a specific authoring tool because the lecture space can be composed with just about any HTML editor.

Teaching lectures. A lecture based on Deeds appears as HTML pages with text and figures. The look and feel of the layout can be totally customised by the author. At this level, a student only ‘sees’ a normal online book or a document. But many of the figures and visual objects are active because they are connected to simulation and editing tools of Deeds.

For example, let us suppose that a theory presents a certain digital circuit, visualising its schematics in a picture. When the user clicks the picture, Deeds immediately launches the corresponding simulator, and opens that schematic together with another window (the assistant browser) that contains step-by-step instructions on how to explore or test the circuit itself.

READ
FPGA's effects on Test and Measurement

Such a procedure is equally useful for conveying concepts of simple components or even complex networks. In the first case, the simulator allows you to explore them interactively. In the second case, signal tracing capabilities in time and data domains allow a thorough test of the network.

Solving exercises. Traditional exercises aim to help understand theory by applying it to simple cases and providing a feedback to the teacher through the delivery of solutions. In Deeds system exercises, the exercises are presented as HTML pages, containing text and figures of the assignments. Deeds allows students to check the correctness of solutions obtained manually and provides graphical tools for editing the webpage containing their reports, until they are satisfied with their work and use Deeds to deliver the reports through the network.

FFZ_5
Fig. 5: The d-DcS Digital Circuit Simulator allows timing simulation of the logic networks

The use of Deeds also implies a different approach to the structure of exercises. In fact, with the simulator, students may be tempted to skip manual analysis. For effective use, the teachers should target the exercises more at the real understanding of issues than at the execution of repetitive, mundane tasks.

Learning to design electronic systems. Development of digital design projects is the field where Deeds can fully be utilised (which is why it is bundled in EFY Plus DVD). In fact, the finite-state machine, the interactive logic simulator and the microcomputer board emulator work simultaneously in the simulation of a system, where standard digital components are controlled by the state machine and/or microcomputer board, which is the case with contemporary digital design. The assignment consists of a functional description and a set of specifications for the system that the students must design. This approach is meant to replicate the features of a professional environment within the guidelines suggested by the educational purpose of the project.

Now users can utilise Deeds to download the assignment from a webpage. Project development phases are guided by help and instructions supplied through the assistant browser. The instructions provided are not step-by-step and require intelligent use of simulation tools and good user initiative.

A great learning tool
Deeds is a great learning tool for all you design enthusiasts. Its flexibility, diversity and ease-of-use make it one of the best tools in the market for anyone interested in digital design.


LEAVE A REPLY