Deeds: One-Stop Solution for All Your Digital Electronics Design Needs

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Deeds, short for ‘Digital Electronics Education and Design Suite,’ is a set of educational tools for digital Electronics that adopt learn-by-doing approach. Developed by the University of Genoa, Italy. We hope you find it as useful as we did

EFY Bureau


Deeds was conceived by the University of Genoa, Italy, as a suite of simulators, tools and learning material for digital electronics design. It helps students acquire theoretical foundations, analysis and problem solving capabilities all over the design electronics domain, and practical synthesis and design skills. Its approach is characterised by the mantra of “learning-by-doing.”

Deeds covers the following areas of digital electronics:

1. Combinational logic networks ranging from simple gates to decoders, encoders, multiplexers and demultiplexers

2. Sequential logic networks from a simple flip-flop to the slightly less simple registers and counters

3. Finite-state machine design and microcomputer programming (at Assembly level) along with micro-computer interfacing

4. Field-programmable gate array programming

Fig. 1: Assistant browser is opened, showing a page with a problem assignment
Fig. 1: Assistant browser is opened, showing a page with a problem assignment

Tools and features

Simulators are integrated around two HTML browsers: an HTML main browser to navigate on the Internet, where students can find lessons, exercises and laboratory assignments, and an assistant browser, which assists students in their work. These browsers allow you to launch all the tools and also interact with them. Hence the browsers can now control editors and simulators, and realise a true interaction between theory and practical results. The main Web browser of Deeds, when activated, shows an HTML page that allows you to connect to the Deeds website and to the ‘online’ learning material developed at DIBE (University of Genoa).

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Fig. 2: An example of a circuit based on the microcomputer component

The main browser has been developed around the standard Microsoft WebBrowser component extended to support all the functions required by the Deeds environment. It is mainly used to connect to the sites containing the learning material. The browser supports all the features that the user can expect to find, including JAVA Virtual Machine, VBScript, JavaScript and XML support.

The assistant HTML browser has characteristics similar to those of the main browser but it is customised to assist students in their work. This browser is used to open lessons, exercises and laboratory assignments. Similar to the main browser, the assistant browser has been conceived around the standard Microsoft WebBrowser component. All the objects visualised on a webpage can be made ‘active.’

There is a schematic digital circuit editor in addition to a component datasheet support. The software houses an interactive circuit animator (to experiment with components and simple networks directly on the schematics), an interactive logic simulator (with a timing diagram tracer to analyse events in the logic networks and to interact step-by-step with the circuit) and a finite-state machine editor/simulator (the algorithm for which is described using the ASM graphical editor). It also contains a microcomputer board emulator (the board includes an 8-bit CPU, ROM, RAM and the requisite input/output ports) and an assembler/interactive debugger module. The schematic editor lets you connect traditional logic circuits with sub-systems with the help of a finite-state machine editor and a microcomputer emulator. Hence it is possible to experiment with systems controlled by state machines and microcomputers with port interfacing and low-level programming of embedded systems.

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Fig. 3: View of the ‘Test on FPGA’ expert window, one of the new tools

Digital circuit simulator d-DcS appears to the user as a graphical schematic editor with a library of simplified logic components customised to pedagogical needs and not describing specific commercial products. As mentioned earlier, the schematic editor allows you to build simple digital networks composed of gates, flip-flops, predefined combinational and sequential circuits, and custom-defined components, which are defined as finite-state machines. Simulation can be interactive or in timing-mode.

In interactive mode, the student can animate the digital system in the editor, thereby controlling its inputs and observing results. This is the simplest way to examine a digital network and hence highly useful for beginners.

In timing mode, the behaviour of the circuit can be analysed by a timing diagram window, in which the user can define graphically an input signal sequence and observe the simulation results. This mode is analogous to professional simulation.

Finite-state machine simulator d-FsM allows graphical editing and simulation of finite-state machine components using the algorithmic state machine paradigm. The tool allows local functional simulation of finite-state machines, which is user-designed with runtime display of relationships between state and timing evolution. Components produced by d-FsM can be directly used in d-DcS and inserted into any digital circuit. These can also be exported in VHDL language. A general-purpose finite-state machine software simulator helps students to enhance their design skills and also facilitates transition from pedagogical to professional field by introducing CAD methodologies.

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