In a complex system design, power consumption of hardware components is a very important performance metric because of the resulting thermal and reliability concerns. Reducing power consumption is a challenge to system designers. Portable systems such as laptops and personal digital assistants (PDAs) draw power from batteries, so reducing power consumption extends their operating time. For desktop computers or servers, high power consumption raises the temperature and deteriorates the performance and reliability.
Measuring and controlling power consumption in a multirail supply system is always tricky for the board designer. The major tasks of measuring, controlling and indicating power consumption should be accurate, easy to accomplish, flexible and scalable depending upon the application.
Power measurement and calculation
For an effective power management and control, the first step should be to accurately measure power consumption of the system.
Power = Vsupply × Isupply
where Vsupply is the input voltage and Isupply the current drawn by the system. Voltage (Vsupply) can be easily detected by an operational amplifier or converted into digital by an analogue-to-digital converter (ADC). For measuring the current drawn by the supply (Isupply), one technique is to have a fixed resistor in series with the supply path and measure the voltage across this resistor—which is basically Ohm’s law.
Fig. 1: A method to determine power consumption on the board
Vrs = Isupply x Rsense
where Vrs is the voltage across the resistor and Rsense the value of the series resistor that can be easily detected.
The value chosen for Rsense is very small—typically less than one ohm—in order to reduce the voltage drop and power dissipation across it. Usually, Vrs would be a small voltage that can be amplified further. A differential or an instrumentation amplifier can amplify this voltage sufficiently to measure.
Now the power is given by:
where Av is the gain of the amplifier.
A general method of measuring power consumption is shown in Fig. 1.
This method uses a differential amplifier to provide gain on Vrs. It uses a two-channel discrete ADC to convert the analogue supply voltage (Vsupply) and the amplified voltage across series resistor Rsense (Av(Vrs)) into digital quantities. The ADC resolution or the number of bits for each voltage determines the accuracy of these conversions. A microcontroller then fetches this data and performs the required actions to calculate, control and indicate power. Additional ICs may be required to enable/disable other payload ICs on the board.
The microcontroller uses the two digital inputs and calculates power by implementing a digital multiplier and divider—for basically solving the equations—through its firmware. The power control mechanism to reduce the power consumption is implemented in the microcontroller. All other routine jobs like enabling controls and reset generation are done with additional digital or analogue ASIC and some glue logic within a discrete component.
There are a number of limitations in the above approach for measuring power:
1. In a multiple-rail system, scaling up or scaling down the design, depending on the number of rails, might require a board re-spin.
2. Flexibility of user-defined actions for each supply is limited as the microcontroller cannot handle high voltages.
3. Additional discrete ICs are required for routine tasks of level-shifting, reset generation, hot-swap, etc.
4. Use of discrete components makes design less reliable and complex.
Integrated power measurement and control
Programmable logic devices (FPGAs and CPLDs) are known in the digital world for their inherent benefits like reduced design time, reprogramming and overall cost reduction. If programmable logic can accomplish board-level tasks like digital housekeeping, glue logic and power management, this can be an integrated power measurement and control function.
Fig. 2: Proposed solution for power management using programmable logic
For example, power management solutions are available where analogue functions are integrated with a programmable logic device. These solutions are suitable for complex power measurement and control as they overcome the limitations mentioned in the previous approach.
The power manager device is a single integrated chip that can perform voltage monitoring, sequencing and control. Its in-built 10-bit ADC converts analogue voltage into digital. An integrated I2C interface allows communication with other devices. The power manager device can provide high-voltage outputs (HVOUTs) and digital inputs/outputs—all of which can be controlled via I2C. The power manager has an integrated programmable logic device that can be programmed by software to accomplish miscellaneous tasks. The programmed file can be downloaded in the device through JTAG.
The system can use an external CPLD that has sufficient number of logic cells (LUTs) to implement a flexible and user-specific power controller function. The CPLD with built-in embedded functional blocks for I2C, SPI and timers can be used to accomplish the miscellaneous board-level tasks mentioned above. It can be programmed by JTAG or through I2C/SPI. The basic concept of such a design is shown in Fig. 2.
The power manager measures the supply voltage and the amplified voltage dropped across the series resistor. The ADC converts these voltages into digital values and stores the values in a 10-bit ADC register. The ADC register can be accessed via the inbuilt I2C interface and the digital values communicated to an external I2C master on the CPLD. Multiple power managers can be connected via I2C bus, each having a unique slave address. The power controller inside the CPLD implements the multiplier, divider and display driver specific to the user requirements. Any power control scheme can be implemented in the CPLD, which can be optimised for any given application.
The advantages of this approach are:
1. For this application, the power manager device can measure up to twelve rails of voltages. So in a multiple rail design, scaling up the system without board re-spin is possible.
2. The power manager has I2C controlled GPIOs and inbuilt CPLD to implement user-defined logic. Additional discrete components are not desired as all the routine jobs of supply sequencing, reset generation and hot-swap actions can be performed by the power manager.
3. The user can re-program the power manager device, thus providing flexibility for changing the design.
4. The embedded functional block I2C/timer implemented in the CPLD leaves enough LUTs for the designer to have a complex power controller that can have multiple functions of multiplier, divider, PWM control, LCD, RTC, etc. The flexibility associated with CPLDs is useful to design the controller depending upon the end application.
5. There are readily available IP and reference designs for the power manager, multiplier, PWM control and miscellaneous functions which designers can use to quickly create power management solutions for their boards, thus reducing the design time and effort.
To sum up
An integrated programmable power manager device provides the perfect combination to implement power control mechanism for power reduction and optimisation. It has the advantages of scalability, flexibility and ease of development while maintaining the accuracy.
The readily available IPs and reference designs can significantly reduce design time. However, the system designer should use his own discretion for choosing the power measurement and control technique depending upon the application.