Designing with FPGAs: An RS232 UART Controller (Part 3 of 5)

Varsha Agrawal

0
3376

The first and second parts of the article discussed the implementation of I2C master controller and LCD display using FPGAs. The focus in this part is on designing an RS232 UART controller using an FPGA for both transmission and reception of data. The basics of RS232 protocol, data transmission and VHDL code along with details are presented in the following paragraphs.

Serial and parallel data transmission
Digital data can be transmitted between two devices using either serial mode or parallel mode of transmission. In parallel mode of transmission, multiple bits are sent simultaneously on different channels (wires) and are synchronised to a clock (Fig. 1). Therefore parallel transmission of data is a type of synchronous data transmission. Parallel transmission of data necessitates use of at least as many lines as there are bits in the word being transmitted.

Examples of parallel transmission protocols include industry standard architecture (ISA), small computer system interface (SCSI), peripheral component interconnect (PCI), IEEE-1284 and IEEE-488. They are used mainly for connections between test instruments or printers and computers located at close distances and within a computer system to transfer data between different units.

Serial mode of data transmission involves the sending of data one bit at a time sequentially over a single communication line (Fig. 2). Serial transmission can either be synchronous or asynchronous.

F2A_Fig_1
Fig. 1: Parallel mode of transmission
5AB_Fig_2
Fig. 2: Serial mode of transmission

In synchronous transmission, groups of bits are combined into frames and frames are sent continuously with or without the data to be transmitted.

In asynchronous transmission, groups of bits are sent as independent units with start/stop flags. Serial transmission is used for sending data between two computers or between a computer and an external device located some distance away.

Examples of serial communication include RS232, RS422, RS423, RS485, inter-integrated circuit (I2C), serial peripheral interface (SPI), universal serial bus (USB), FireWire and Ethernet.

An RS232 bus is an unbalanced bus capable of full-duplex communication between two receiver/transmitter pairs, named data terminal equipment (DTE) and data communication equipment (DCE). RS422 and RS485 are balanced, twisted-pair interfaces capable of speeds up to 10Mbps and distances up to 1220m (or 4000 feet). Being differential buses, they offer better noise immunity as compared to a single-ended, unbalanced bus such as RS232. The I2C bus was discussed in the first part of the series having two signal wires, namely, data (SDA) and clock (SCL).

The SPI is a synchronous serial bus comprising four signals, namely, the master out slave in (MOSI), master in slave out (MISO), serial clock (SCK) and active-low slave select (SS). Microwire is a three-wire synchronous master/slave bus, with serial data out of the master (SO), and serial data into the master (SI) and signal clock (SK).

FireWire is a serial bus interface standard for high-speed communications and isochronous real-time data transfer. Ethernet is a family of computer networking technologies for local area networks (LANs). Systems communicating over Ethernet divide a stream of data into shorter pieces called frames. Each frame contains source and destination addresses and error-checking data so that damaged data can be detected and re-transmitted.

The focus in this article is on transmitting and receiving data using RS232 protocol. Therefore this protocol is discussed in detail in subsequent paragraphs.

RS232 interface
RS232 interface is the Electronic Industries Association (EIA) standard for serial transmission of binary data between two devices, namely, the data terminal equipment (DTE) and the data communication equipment (DCE). The standard defines the electrical characteristics and timings of signals and physical size and pin-out of connectors.

The RS232 standard was introduced in the year 1962 by Radio Sector of EIA. Five revisions have been made to the standard since then. The most recent version of the standard is RS232 E and it is now addressed as EIA/TIA-232 E (Electronic Industry Association and Telecommunications Industry Association).

C56_Fig_3
Fig. 3: RS232 data format
888_Fig_4
Fig. 4: Data frame when character ‘A’ is sent

The RS232 standard specifies that a logic ‘1’ is sent as a voltage in the range of –15V to –5V and logic ‘0’ is sent as a voltage in the range of +5V to +15V. The standard specifies that a voltage of at least 3V amplitude will be recognised correctly at the receiver according to their polarity. It is an asynchronous standard and the transmitted bit sequence comprises a start bit, seven or eight data bits, an optional parity bit and one or more stop bits. The start bit is always low (logic ‘0’ or space) and the stop bit is always high (logic ‘1’ or mark). The parity bit used can be even parity or odd parity. The data format used for RS232 transmission is shown in Fig. 3. Fig. 4 shows the data frame used to send character ‘A’ when one stop bit and odd parity is used.

LEAVE A REPLY

Please enter your comment!
Please enter your name here