How to design and develop impressive wireless products

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Dilin Anand and Abhishek Mutha of EFY spoke to Badri Kothandaraman, Executive Vice President of Data Communications Division and head of Cypress Semiconductor India about wireless USB, Bluetooth 4.0, benefits of using Programmable System on Chip PSoC® and much more. Read on to find out the interesting technologies in the wireless and USB space.


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Badri Kothandaraman

Q. When devices are wireless, design and testing presents an array of new and varied challenges to the test engineer. How do you manage these challenges?
A. First, a significant Design For Testability (DFT) needs to be built into the chip. We need to have built-in self-test (BIST) where the chip is capable of testing itself. Testing RF is always tricky. In the last 2 years, we are doing pre-silicon validation platform (PSVP) testing. This means we model/ mimic the chip as close as possible and build a real interface to the external world. PSVP is challenging to create – for analog circuits, a test chip is needed and for digital circuits, RTL can be ported into an FPGA. There are limitations on PSVP, but it helps to get rid of the obvious or mundane issues and allows more efficient silicon debug to focus on real issues. It is also possible with a well-constructed PSVP, we can test for all kinds of interference and do interoperability testing on multiple OS systems. Once this is done, the firmware algorithm can be tweaked and algorithms fine-tuned with respect to frequency hopping, for example. We are pretty disciplined about not starting silicon, until we do a good job on PSVP. However, PSVP can only help upto a certain extent. When we design-in wireless USB parts at customers, issues at each customer are usually different. For example, wireless USB is a proprietary 2.4GHz and there is no standardized way of designing the antenna. The inter-operability and interference criteria are also different for each customer. On the other hand, it will be relatively easy to design with Bluetooth low energy, as it is standards-based technology and there will be no dongle design as the hosts (laptops, tablets, smart phones) have the radio embedded in their RF combo chip sets.

Q. How difficult is it to integrate low power, reliability and interference immunity into wireless products? What are the design challenges faced?
A. Integrating analog and digital into the same chip is always a design challenge. Substrate noise is a very big challenge and we need to isolate switching blocks from analog blocks. On the other hand, with the latest advances in technology, CMOS Low Power RF is now possible. Consider the WirelessUSB™ NL from cypress (http://www.cypress.com/?rID=54419) chip that consumes only about 15/18 milliamp in TX/RX communication. While meeting power requirements is a modest challenge, signal loss or report loss due to interference is a real issue. To deal with it, there are common design techniques. One of them is frequency hopping to move from one frequency to another. Another technique to counter interference which was used very successfully in Cypress first generation radios was DSSS (Direct Sequence Spread Spectrum) where the transmitted signal has a higher bandwidth in order for it to be more robust.

Q. Could you elaborate more on wireless USB and its applications? Is there an alternative to it?
A. The most common application of wireless USB is a wireless mouse with a dongle attached to the PC via USB. Cypress is into such human interface devices such as wireless mice, keyboards, remote controls, wireless trackpads and toys. These are all proprietary protocols in 2.4GHz RF, so each design is custom. However, the future is going towards Bluetooth low energy (BLE) which is a standard-based technology, still in 2.4GHz range. This means that a USB dongle is no longer required, as BLE capability would be built into the combo-radio chipsets inside the hosts. The BLE mice would directly communicate to the combo-radio chipsets inside laptops, phones, tablets.

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