“Domains such as automotive, medical electronics, the Internet of Things (IoT) are heavily mixed-signal oriented,“ opines Nimish Modi, senior vice president – Marketing and Business Development, Cadence Design Systems, as he talks to Priya Ravindran of EFY about what drives Cadence and the electronic design automation (EDA) space today.
Q: What is your unique selling proposition (USP)?
A: We call it the system design enablement strategy. Our customer base has traditionally been primarily system-on-chip (SoC) developers and we’re increasingly enabling system companies by providing chip, packaging and printed circuit board (PCB) tools, solutions and content like intellectual properties (IPs) to enable the development of end-products. The foundation of our strategy continues to be core electronic design automation (EDA), right from register-trasfer-level (RTL) code to graphical data stream format (GDSII) for layout design, including verfication. We also provide differentiated packaging/ PCB solutions and there is a large focus on IP creation and system integration.
Q: Could you elaborate on the intellectual property (IP) content creation focus?
A:The number of IP blocks in an SoC is increasing significantly and customers are increasingly looking to outsource their IP needs. We provide design IP, verification IP and digital signal processing (DSP) IP. In design IP, we focus on building differentiated solutions for interface-based IP at the most advanced process nodes. IP is a fairly new business for us, which really started with the acquisition of Denali in 2010, which provided memory controllers, memory models and verfication IPs. Since then, we have also acquired Cosmic Circuits and Evatronix for design IP and Tensilica, which provided industry leading DSP IP. IP is the fastest growing part of our overall business and accounts for 12 per cent of our business.
Q: What does Cadence offer for system integration?
A: System integration is a key component of our system design enablement strategy. As we move towards lower geometry process nodes and miniaturisation, there are many more issues related to noise, cross-coupling effects, magnetic and electrical effects that come to the fore and ensuring signal integrity becomes critical. Our Sigrity acqusition, a signal and power integrity analysis tool in the PCB designing and packaging space, helps significantly with chip-package-board system analysis.
Hardware-software convergence is another focus area, since developing software and ensuring that it works coherently with the hardware is typically the determining factor for system time-to-market. Our system development suite offers a continuum of solutions, from simulation, emulation and formal analysis , to prototyping, based off a metric-driven methodology. Depending on what stage of the design cycle you are in, you can choose the engine that suits your requirements to arrive at the right trade-off between accuracy and speed.
Q: Could you tell us about the design services Cadence offers?
A: The main offerings of Cadence would be in terms of tools, services and IP. We offer design services to build complex SoCs, custom IPs, provide methodology and training services to enable the customer to optimise the solutions. We collaborate with the customers to implement key design capabilities including low-power design, packaging and board, functional verification, digital and analogue/custom mixed-signal design implementation. We also offer hosted design services for customers as a software-as-a-service solution.
Q: How would you equip your tools to cope with the changing trends?
A: Our system design enablement strategy does exactly that. One of the key trends is for system companies to become vertically-aggregated and own the development of the various layers of the system stack – the chip, board, software, system integration etc. Our portfolio, which spans core EDA tools, packaging/ board and system integration tools, and now includes content as well, puts us in a really good position to help these system customers. This content, like I mentioned earlier, could be IP content or embedded software that help system designers build actual end-products and take their concept from idea to materialisation. We work very closely with our customers and engage with them at a very early stage to understand their specific challenges and collaborate, even in a co-development model, to build and deliver suitable solutions.
We are looking at targeting specific vertical applications beyond the consumer wireless and telecommunication space. We are looking to extend our solutions to suit the automotive industry and are exploring others such as industrial and medical electronics. Innovating to address the specific needs of these segments and developing and nurturing strong ecosystem partnerships are key.
Q: Could you tell us what kind of work you would be doing in these new sctors?
A: Let us take the automotive sector. Movement towards autonomous driving vehicles, along with the need for increased performance, efficiency and safety are driving tremendous change in the industry. Supporting real-time data processing for sensors, cameras etc, to enable sensor-fusion for safety critical-systems is a key requirement and our Tensilica image and video processing enables that. A recent example is the Tensilica usage in an NXP chipset for enabling vehicle-to-vehicle communication. Automotive Ethernet enables high-speed communication between cameras, electonic control units (ECUs) and other advanced driver assistant systems (ADAS) and we offer Ethernet media access control (MAC) IP and associated verification IP as well. Also for functional safety, our Incisive simulator provides capabilities to support compliance to the International Organisation for Standardisation (ISO) 26262 standard.
Domains such as automotive, medical electronics, the Internet of Things (IoT), are heavily mixed-signal oriented and Cadence’s strong mixed-signal design and verification tool and IP portfolio helps us target these sectors.
Q: Could you tell us about your latest products?
A: On the digital front , we have introduced several new, highly-innovative products over the past couple of years. We have Tempus for timing signoff, Voltus for power signoff and Quantus for fast, high-fidelity resistor-capacitor parameters (RC) extraction. Innovus, our next generation place-and-route tool was launched earlier this year and has strong momentum, with customers such as Qualcomm Technologies, Nvidia, ST, Juniper and ARM endorsing it. And Genus, our next-generation physically-aware synthesis solution was launched last quarter. We have common engines, database and user-interfaces across these tools and when they work together, there is better predictability, efficiency and productivity. The number of iterations of the design reduces as each stage is aware of what can be expected next and we can arrive at a better answer, faster.
Verification is an extremely critical challenge for our customers, as the cost of failure is too high – re-spins are not just expensive in terms of cost, but the market window may be compromised as well. Our system development suite verification platform comprises of several solutions offered with a metric-driven methodology approach that enables tracking to the verification plan and improves quality convergence, enabling a faster time-to-market. With the acquisition of Jasper and integration of formal analysis into our tools, we are strengthening our portfolio and it will be further augmented by our next-generation emulation platform, which will be shipping later this year. We also have a new high-level synthesis solution called Stratus and we recently introduced the Indago Debug Analzyer, which accelerates the critical root-cause analysis process for debugging. There is also Perspec for system-level verification and this uses specific software use-case directed testing to guide verification.
We are also working on developing sophisticated packaging techniques and interconnects. With bendable PCBs being the order of the day, flexible electronics is a key focus.