Sunday, November 24, 2024

Hardware Developer At IBM In Bengaluru

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Location: Bengaluru

Company: IBM

Responsibilities

This role does design and layout of complex VLSI (very large scale integration) circuits using graphic editing tools in Analog domain. A major portion of the job is in creation of new physical design data from concepts, partial schematics or a working knowledge of overall requirements. Responsibilities include checking the design integrity with respect to semiconductor ground rules and the logical function of the circuit. Symbolic circuit data (schematics) are converted to physical shapes which represent the semiconductor process. The role ranges from manual shapes and checking tool manipulations to extended team coordination and methodology creation. The employee guides functional objectives or technologies.

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Skills

Environment:

Professional knowledge related to incumbent’s function/business unit and its processes.

Communication/Negotiation:

Advise other professionals. Effectively utilize group dynamics. Negotiate to define approaches and goals. Able to quickly ramp up on the layout flow

Problem Solving:

Recognize complex problems related to functional objectives. Analyze situations and implement solutions, or develop new system elements, procedures or processes. Creativity and judgment applied to developmental work on different projects within the business environment.

Contribution/Leadership:

Provides ongoing technical /operational guidance to lead professional work teams, conducts special projects, or manages department(s) (national or international). Understand department/ functional mission and vision. Defines and decides objectives within specified business concept or project and may have responsibility for tools and assigned resources. Utilizes expertise to directly influence people outside department or function. Sometimes no precedent exists.

Impact on Business/Scope:

Accountable for department results and for activities and/or projects involving multi-functional teams. Regularly participates in overall functional program planning. Activities are subject to business measurements, impact customer satisfaction, and impact project costs or expenses.

Required Technical and Professional Expertise

  • Hands on work on custom layout for analog blocks like High Speed SerDes and General purpose IO designs with Cadence Virtuoso on latest technologies like 5nm and below and also take leadership roles in delivery of IPs 2. Work on Floor planning, power design, signal routing strategy, EMIR awareness and parasitic optimisations
  • Understand and apply analog Layout techniques to ensure the design meets performance with minimum possible area and good yield.
  • Participate in building and enhancing layout flow for faster, higher quality design process.
  • Checking physical verifications like DRC/LVS/ERC/ANT/DFM and other IBM internal checks
  • Collaborate with Circuit Designers to solve challenging problems
  • Writing SKILL scripts to automate repetitive tasks
  • Work with Place and Route engineer to integrate custom macros into top level.
  • Able to perform design reviews across global team
  • Work closely with required global teams to ensure the success of the whole product. 11. Leadership in delivery of macros we plan to own from India

Requirements

  • Experience in doing layouts for analog blocks like SerDes, ADCs, DACs, LDOs, PLLs, BGAP & amplifiers etc.
  • Experience in designing layouts for high-speed circuits is a plus.
  • Layout experience in the following technology nodes: 3nm, 5nm and 7nm FinFET.
  • Good team worker with multi-discipline, multi-cultural and multi-site environments
  • Strong fundamental knowledge in semiconductor device physics, layout principles, IC reliability and failure mechanisms
  • Good problem-solving skills are essential where problems are analysed upfront, identifying gaps, and providing optimum solutions
  • Knowledge in Skill/perl/tcl/Python scripting is a plus.

Preferred Technical and Professional Expertise

  • Automation skills in PERL ,SKILL and/or TCL/Python

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