The reference design demonstrates peak current control in a ZVS Full-Bridge topology with digital slope compensation for efficiency and reduced software overhead.
The power electronics industry increasingly demands higher efficiency, reliability, and power density. This demand has spurred the rapid expansion of digital power solutions, particularly in the telecommunications and server power sectors. Digital control of power supplies has been a widely discussed and debated topic for years. The integration of sophisticated peripherals for power supply management into microcontrollers and the advent of advanced high-speed devices in the semiconductor industry has facilitated greater adoption of digital power technologies. Techniques previously dominated by analogue solutions are now achievable with digital methods. In light of these developments, the reference design from Microchip demonstrates the application of peak current control within a ZVS Full-Bridge topology, utilizing a fully digital slope compensation technique that minimizes software overhead.
The 750W AC-DC Reference Design features a semi-bridgeless PFC topology followed by a peak current controlled zero-voltage switching full-bridge (ZVS FB) converter with digital slope compensation for very high conversion efficiencies. This power supply supports firmware updates, including the compensator algorithm, with zero downtime to the system it powers while operational. It utilizes two dsPIC33EP “GS” digital-power DSCs for full digital control of the power conversion and all system management functions.
The ZVS FB Converter is engineered to reduce an input DC voltage of 400V to an output DC voltage of 12V. A distinctive aspect of the reference design is its implementation of peak current control through a fully software-based slope compensation algorithm, which prevents the need for external analogue components for slope compensation. The design is offered royalty-free under the terms of the licensing agreement.
The design boasts full digital control and a standardized 1U form factor, featuring a 20 ms minimum hold-up time to compensate for drop-outs during UPS step-in. It includes both under/overvoltage lock-out and adaptive control. A peak current-controlled ZVS Full-Bridge Converter utilizes unique adaptive digital slope compensation software. Additionally, the system demonstrates the capability for online firmware updates (Live Update) on both the PFC and DC-DC converter stages, enhancing functionality and performance without downtime.
The ZVS FB Converter is extensively utilized in server and telecom power supplies, battery chargers, and renewable energy applications, mainly due to its high-efficiency operation and straightforward control mechanisms. Typically, this topology employs either Average Current mode control or Voltage mode control, necessitating a capacitor in series with the transformer to avert flux walking.
However, the implementation of peak current control eliminates the need for the series capacitor through dynamic flux balancing. This approach addresses subharmonic oscillations, common in duty cycles over 50%, by integrating a slope compensation ramp that is either added to the inductor current or subtracted from the peak current reference produced by the voltage loop compensator. Peak current control, primarily an analogue technique, is implemented using components such as linear amplifiers, transistors, RC networks, analogue comparators, or through dedicated Application-Specific Integrated Circuits (ASICs).
Microchip has tested this reference design. It comes with a bill of materials (BOM), schematics, assembly drawing, printed circuit board (PCB) layout, and more. The company’s website has additional data about the reference design. To read more about this reference design, click here.
