Cadence Design Systems recently conducted its annual user conference, CDNLive India 2016. The conference brought together users and industry experts from semiconductor and electronics product and design services companies. The two-day conference was held on August 9 and 10 at the Park Plaza Hotel, Bengaluru.
Speaking about the conference, Jaswinder Ahuja, corporate vice president and managing director of Cadence India, said, “Over the years, CDNLive India has become one of the most eagerly awaited conferences for the EDA and electronic ecosystem. It’s inspiring to see the enthusiasm amongst the attendees, many of whom have been attending the event for several years, which is a testament to the growing semiconductor and electronics design community in India.”
Keynote Speakers at CDNLive
Michal Siwinski, vice president product management, System and Verification Group, Cadence Design Systems, Inc., presented the keynote talk at CDNLive, on “Expanding your Opportunities with System Design Enablement”. He talked about the focus on analog designing over digital. The capabilities of Virtuoso tool compliment these factors nicely.
The guest keynote for the day was by Dr. Karthik Sankaran, general manager, IoT Platform, Analog Devices, Inc., on, “Internet of Things (IoT) – Technology and Application Driver for the Semiconductor Industry”. His talk focused on ADI’s role on the IoT environment.
He said, “The current systems work for only alarms and not for predictions.” He also highlighted some areas where the current systems could improve for example, count based insurance systems and calorie based intake systems.
He talked about the different kinds of processing required with the IoT environment. There is a lot of scope for vision based processing spanning over food and processing, health, medical, agriculture and automotive to count some of the few.
Day 2: Expanding scope of development at CDNLive
Vivek Mishra, vice president of product engineering in the Digital and Signoff Group, Cadence Design Systems, Inc., presented a keynote, on the second day on, “Expanding your Opportunities with System Design Enablement”.
The session focused on the development of cadence tools over the years, and the evolution of cadence engines. The trends in custom/analog/mixed signal designing were also highlighted in addition to the capabilities of Modus tool.
The guest keynote was presented by Balaji Kanigicherla, founder, CTO and vice president of engineering, Ineda Systems, on, “Internet of Things – Opportunities and Challenges”. He talked about challenges with the current automated machines. These include contextual awareness, security, connectivity and cloud infrastructure among others. The challenges in the current machines will have to be taken care of to accommodate the high number of expected devices.
Award Winners
The keynote was followed by paper presentations by industry professionals. The best paper award winners were announced on day 2 of the event.
| Track | Company | Topic |
| System/Verification:
Productivity |
Texas Instruments | Comprehensive and Efficient GLS using Innovative Apps |
| System/Verification: Advanced Methodology | NXP Semiconductor | Fault Verification Of Safety Centric Automotive Mixed Signal Chip |
| System/Verification: Formal | Texas Instruments | Functional Safety Analysis Demystified With Cadence Safety Verification Solution |
| System/Verification: Hardware Assisted | Analog Devices | Enhancing Transaction Based Acceleration Performance using Efficient SCE-MI modelling |
| PCB Design & IC Packaging | Seagate Technology HDD India Pvt Ltd | High Speed Signal Routing Techniques & Challenges |
| Custom/Analog: Implementation | NXP Semiconductor | A Novel EMIR Methodology For Embedded Memories |
| Custom/Analog: Verification | Texas Instruments | Comprehensive Automated Design Validation Suite for Standard Cells |
| System-to-Signoff: Digital Implementation | Broadcom | Physical Implementation tricks & techniques with Innovus for large designs |
| System-to-Signoff: Digital Front-End | GlobalFoundries | Abstract Boundary Model Based Test Architecture |
| System-to-Signoff: Signoff | Freescale Semiconductors Pvt. Ltd. (part of NXP Semiconductors Group) | Signoff Timing Analysis Challenges and Solutions for Hierarchical Designs |
“Cadence has a high-performance culture that encourages its employees’ growth and development while keeping a sharp focus on business results,” said Jaswinder Ahuja, corporate vice president and managing director at Cadence India, on Cadence being ranked among the top companies to work for in India by the Great Place to Work (GPTW) Institute. “Customer orientation, innovation, excellence in execution, teamwork and camaraderie are some of the cultural attributes that create an environment for the best people in the industry to do great work every day. We are all proud of these recognitions.”
