About the Challenge
IIT Hyderabad is conducting a fully automated national level cloud based Analog IC design Hackathon on using Synopsys commercial tool. The entire hackathon is on cloud with no-human-in-loop apart from doubt solving.
The contest is inviting all Indian college students to explore IC design using commercial tools. The participants will use Synopsys iPDK and Synopsys Custom Design Platform to design, simulate and analyze their circuits.
Timeline
Registration for the Hackathon: 5 Feb – 13 Feb 2022
Report Submission: 9 Feb 2022
Design Implementation: 20 Feb – 26 Feb 2022
Result Declaration: 8 March 2022
Rewards
e-Certificates will be awarded only to the participants who complete the design successfully.
Internship opportunity to participant who successfully complete the design.
Interested participant can continue the research and enhance the IP with IITH team support.
Participants can register here.
