With a LEGO-like design for a stackable, customizable artificial intelligence chip, MIT engineers have taken a step toward a modular chip design.
Traditional wiring is used in other modular chip designs to transmit signals between layers. The MIT approach transmits data across the device using light rather than physical cables. The chip’s layers communicate optically thanks to alternating layers of sensing and processing units, as well as light-emitting diodes (LED). As a result, the chip may be changed, with layers that can be swapped out or piled on to add new sensors or processors, for example.
“Other chips are physically wired through metal, which makes them hard to rewire and redesign, so you’d need to make a new chip if you wanted to add any new function,” says MIT postdoc Hyunseok Kim. “We replaced that physical wire connection with an optical communication system, which gives us the freedom to stack and add chips the way we want.”
The design of the team is now set up to perform basic image recognition jobs. It accomplishes this by overlaying image sensors, LEDs, and processors created from artificial synapses – arrays of memory resistors, or “memristors,” discovered by the team before, that work together to form a physical neural network, or “brain-on-a-chip.” Without the use of external software or an Internet connection, each array may be trained to process and classify signals directly on the chip.
The team’s optical communication system is made up of linked photodetectors and LEDs with small pixels printed on them. Photodetectors combine to form an image sensor that receives data and LEDs that send it to the next layer. When a signal (such as a letter image) reaches the image sensor, the image’s light pattern encodes a specific configuration of LED pixels, which stimulates a second layer of photodetectors, as well as an artificial synapse array, which classifies the signal based on the pattern and strength of the incoming LED light.
The researchers made a single chip with a computing core that was around 4 square millimetres in size. Three image recognition “blocks” are layered on the chip, each having an image sensor, optical communication layer, and artificial synapse array for identifying one of three letters: M, I, or T. They then projected a pixellated image of random letters onto the chip and measured the electrical current produced by each neural network array. (The higher the current, the more likely it is that the image is the letter that the array has been trained to recognise.)
The researchers discovered that while the chip accurately recognised clear images of each letter, it struggled to discern between hazy images, such as I and T. The researchers were able to rapidly replace out the chip’s processing layer for a superior “denoising” processor, and the device was able to correctly identify the images after that. The researchers want to expand the chip’s sensing and processing capabilities, and they envisage a wide range of uses including a general chip platform, edge computing solutions, different types of neural networks, and much more.
