Sometimes used interchangeably, verification and validation ensure that the system being created will meet the requirements of the customer. When the specifications are validated and the system is verified against the specifications, the concluding system fulfills its purpose. Sounds simple, right? But it is pretty challenging and demanding being a verification and validation engineer.

“The purpose of verification and validation is to ensure ‘first time right silicon’ or few silicon revisions, as revisions are costly in terms of money, effort and time. To ensure correct functionality, designs need to be validated across various parameters, which involves different types of analysis,” says Deep Masiwal, CEO, Adroit IC Design.

From ensuring ‘does this thing work right’ (verification) aspect to ‘you built the right thing’ (validation), these engineers ensure designs meet requirements and experience the pain of product reworks, pressure of meeting deadlines for the products to be released as per customers’ demands, ensure the verification and validation processes are effective, avoid additonal expenses and delays, ensure product quality and reduce prototyping costs.

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Scope
There is an excellent scope and opportunity in the field of verification and validation believes Rahul Malvi, CEO, Wafer Space. Talking about verification, he says, “Verification occupies the largest portion of the design cycle and, with the size of designs today, it gets more and more complex and critical to the success of the semiconductor vendor.”

On a similar note, Srinivas Mandavilli, country manager, Imagination Technologies India believes that SoC designs are only to get larger and more complex. He says, “In many cases, verification consumes more than 70 per cent of the total design effort. Opportunities in verification and validation are going to increase over the next few years and get more specialised.”

Masiwal says, “The total percentage of verification and validation projects carried out in India is 50-60 per cent, which is a pretty big number and highlights its significance in the industry. One can make a very good career in this field.”

“A person who gets into verification and validation has a holistic view of the design at a very early stage of his/her career, and this opens up a wide career path. With this exposure, the person has an option to switch to design phase to become a very good systems architect who understands full systems perspective from functional to error scenarios, which can be taken care in the early design,” says D. Srinivasan, managing director, Mobiveil.

It is fundamental to appreciate this fact that, in general, the number of designs that start from scratch has been on a decline for a few years now, across this industry, believes Srinivasan Venkataramanan, chief technology officer, CVC Pvt Ltd. He says, “It is not a bad scene but rather a reflection of market which demands more and more integrated devices such as smartphones and chipsets, and ever-shrinking time-to-market schedules. Hence the term ‘designers’ in modern day refers to a wide spectrum of engineers in verification/validation domain such as system integrators, RTL block owners, modifiers, verification environment designers, etc as each one of them do look at some key aspects of the design.”

Entry-level opportunities
Masiwal informs that for freshers, the opportunities are in two areas, namely, ASIC functional verification and memory IO, and analogue IP validations/characterisation/layout. He says, “The fresher is a part of a team consisting of seniors and is expected to understand the design, validate and simulate the design, run functional checks and ramp up fast. Our company expects fresh graduates to have good knowledge of analogue and digital design fundamentals.”

Whether there are opportunities for senior, junior or fresher, one needs to appreciate the market demands to chalk out their career path in any domain, believes Ajeetha Kumari, chief executive officer, CVC Pvt Ltd. Coming to this specific domain, she says, “Typically freshers are seen as out-of-the-box thinkers, smart engineers with innovative mindsets and zeal to learn new skills, and they are also realised as part of the ‘market segment’ as they are one of the biggest consumers and market drivers for many of these hardware devices being designed/developed.”

With verification dominating the ASIC design project cycles, she further adds, “The term ‘verification engineers’ gets often further classified to verification environment developers, verification owners/execution engineers, regression owners and coverage closure engineers, coverage model developers and assertion developers, formal verification engineers. However, there is also a steady intake of FPGA RTL designers.”

Talking about the entry-level roles for freshers, Paramita Kapat, head HR, eInfochips shares, “Entry-level roles and responsibilities, in the services companies who provide their verification services to product companies, will include—maintaining the regression suite, running the regression and reporting the results to the team, owning some small block verification, writing test cases and debugging the failures, etc.”

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