“The traditional challenge of getting everything to go faster, hasn’t eased up a bit”

Conrad J Fernandes, VP, Asia-Pacific, Teledyne Lecroy,spoke to Ashwin Gopinath of EFY about the host of challenges facing T&M players today, especially on dealing with faster devices.

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Conrad J Fernandes, VP, Asia-Pacific, Teledyne Lecroy
Conrad J Fernandes, VP, Asia-Pacific, Teledyne Lecroy

Q. What is the major challenges facing T&M players today and how are you trying to circumvent it?

A. One would be the traditional challenge, where we need everything to go faster. That challenge hasn’t eased up a bit. With the growth in cloud computing and the need for data rates to go from gigabits to hundreds of gigabits and beyond, it only served to create similar challenges all throughout. Different manufacturers have taken different approaches, to tackle this problem and make devices go faster. For instance there is a technology called DBI (digital bandwidth interleave). This is a technology which allows for any silicon implementation of an amplifier to go twice as fast, by interleaving them. Digital bandwidth interleave, involves additional hardware, calibration and digital signal processing at the back end to recover the signal input by the oscilloscope user.

Q. What is the biggest challenge that a designer faces as he packs faster signals into a smaller time periods?
A. The world used to be full of square waves, digital signals were all square waves. These days, nothing is really square. The top section isn’t flat, the bottom isn’t a zero, the edges aren’t perfectly straight. In fact, not only do they have timing issues, but they also move around in time. So, this jitter becomes very important as you try and pack faster and faster signals into a smaller period of time. Any timing uncertainty i.e. jitter, creates significant challenges and hence, not only do we need to measure, we also need to characterize jitter and determine where it’s coming from. This means that instruments with very very high timing resolution can help with the above issues.

Q. Can you list some of the exciting features in test, which enable better accuracy at higher speeds?
A. We are seeing a couple of interesting things going on. The speed is increasing all the time, that is something we understand. The timing resolution has also gone upwards for a steady while now. The other thing that is becoming more possible is vertical resolution. Our mainstream oscilloscopes are moving up in vertical resolution and what comes with that is increasing vertical accuracy and lower vertical noise. All these features allow you to get much better representations of signals. We see the emergence of these features as enabling the emergence of a whole new realm of analysis, stuff which wasn’t previously feasible. For example, oscilloscopes have been able to do FFTs (fast fourier transforms) for a long time. They’ve been kind of a poor man’s approach to spectral analysis as the spectrum analyser has much greater spectral resolution and accuracy but as you increase the resolution of the ADC in a test instrument, it becomes much more able to perform some of that analysis. I don’t think that the day a spectrum analyser is replaced by an oscilloscope is close, but I do think we can give the designers much better tools than what we’ve been able to, as this is the age of increasing vertical resolution,vertical accuracy increases and reduction of noise in the circuit.

Q. How critical is maintaining signal integrity during times where signals are getting really fast?
A. As high speed signals need to be routed into more and more compact and sometimes, less friendly environments, the need for signal integrity measurements and techniques has become much more prevalent. So, we’ve seen things like network analysers being used to ensure the integrity of PCBs and so, our signal integrity network analyser has found some really interesting applications there. As the aforementioned high-speed signals move through the boards, you need to manage the impedance of the boards very carefully. SPARQ, which stands for s-parameters Quick, provides s-parameters for printed circuit boards much faster than what is possible with the use of network analysers.

Q. What is the biggest challenge faced in characterising PCBs for high-speeds?
A. Traditionally, it’s been done with a number of tools, like network analyzers and then TDR (time-domain reflectometry) systems based on oscilloscopes. Those are very powerful because you can measure impedances on controlled buses but they are extremely fiddly to use and not to mention, get accurate measurements out of. Our team took the basic capability from our very high-speed sampling scopes and pulse generators and integrated all of them into an automated system. With the enhanced speed of getting the required parameters, we feel like we took a lot of the burden off the designer and allowed them to get the information they want much faster.

Q. Now that we have internet-enabled oscilloscopes, are there security concerns that test engineers have to be aware of?
A. Well, these days, most of the oscilloscopes can be hooked up to the internet and as we know, that creates a lot of opportunities to be more creative and it also creates new challenges. I would say, network security for those instruments is really no different, to the network security for a PC, connected to the internet. A related challenge is protecting these instruments from viruses or infections. We’ve certainly been very careful in the screening and the approaches we take in our production line to isolate instruments that will be shipped to the customers from what might be present on our networks. In the end though, the onus will always be on the user. We do make sure to give our users the latest anti-virus protection while asking that they do follow safe computing practices.

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