“A small leak will sink a great ship.” —Benjamin Franklin, American statesman

These words of Franklin indeed hold a lot of meaning and relevance for engineering teams that design embedded systems and chips, as they well understand that resource-pilferage during the process of product design can lead to unwarranted outcomes. Resource-leakage has always remained one of the key challenges and primary concern of engineers designing chips and embedded systems.

Although every design engineer invariably tries to prevent resource-wastage, yet this is a phenomenon that seeps in during the process of product development. The reasons can be many, but the repercussions may range from increased power consumption and prolonged development cycle, to adverse effect on the system’s eventual cost!

Thus, the embedded systems and chip designers aim to optimise the system’s performance and keep the time-to-market as low as possible. From selecting the right processor for the onboard memory, to selection of other resources that can be populated on the system hence become critical choices. No wonder design engineers have begun to hail frugality in resource consumption as the key engineering goal.

Why is it so critical to be resource-efficient?
Before evaluating the reasons that make frugality in resource consumption a critical requirement, let’s first understand what the term frugality means for an embedded system development engineer and chip designer.

“For an engineer designing embedded systems, achieving resource optimisation may include tasks like minimising the memory-footprint and the number of clock-cycles consumed. For a chip designer, frugality may mean minimising the area occupied on a die, or the amount of power consumed,” quips Prashant Rao, technical manager-application engineering & training, MathWorks India. For an engineering manager doing more with less is a perpetual requirement. Reusing as much intellectual property as possible, and minimising the number of engineering and indirect resources needed for bringing a product to market, are some of the other forms of frugality that engineering managers practice in their day-to-day activities.


For an engineer designing embedded systems, achieving resource optimisation may include tasks like minimising the memory footprint and the number of clock-cycles consumed. for a chip designer, frugality may mean minimising the area occupied on a die, or the amount of power consumed

If attained, resource optimisation can lead to a significant and sustainable reduction in the project duration and the number of design iterations needed to identify bugs or defects.

Apart from this it is important to consider the fact that research and development process of any embedded system is a cost- and resource-intensive process. “In countries such as India, where cost is often a constraint and customers are extremely price-sensitive, it is more important than ever to find ways to cut down research costs. In this context, frugal engineering becomes an important aspect of product design and development,” affirms Dr Vineet Dravid, MD, Comsol India.

Lesser the resources a design consumes, lower is the power consumption of the device. Also, with low resource utilisation an engineer can build a smaller device that will further reduce the power consumption and cost.

Resources that can be optimised
Research shows that only one of every seven embedded projects is successful, which is a very scary figure indeed. Hence, paying attention to resource-optimisation becomes a crucial requirement in developing an embedded system or chip. Let’s now take a look at a few resources that frugal design engineers usually attempt to optimise:

1. From the field-programmable gate array (FPGA) point of view, resources that engineers attempt to optimise are look-up tables, flip-flops, embedded memory blocks and embedded digital signal processing (DSP) blocks.
2. Other than this, weight, size, cost as well as other parameters of the embedded system, such as heat generation, are important factors for design engineers. The time taken to bring a product to market is also critical and designers strive to minimise it.
3. The amount of memory needed for an embedded application or the number of available CPU cycles that the application requires to execute successfully are also important factors.
4. Area, power consumption and latency in designing hardware implementations are a few other aspects that need careful evaluation.
5. Optimisation of logic to effectively utilise the processor, memory and power consumption is also an essential element to building a good embedded system.
6. Another key consideration is minimising the number of design iterations or mitigating the design defects—particularly those that lead to recalls, patches, or expensive field servicing.

A few resource drainers
Despite exercising caution, there are times when design engineers encounter bottlenecks and resource drain. Considering the hazards of neglecting this pilferage, it becomes worthwhile to evaluate the key reasons that lead to this wastage.

If there are too many frills. “Usually, too many resets or unrelated clocks in the design tend to increase the resource-footprint. Resource utilisation is also affected when engineers try to leverage the legacy designs where optimal design recommendations are not followed. Examples include latch usage, passing clocks through look-up table elements, etc,” affirms Akshat Jain, FAE, Xilinx India.

If the compiler generates redundant code and logic. “When using high-level programming languages, the compiler sometimes introduces redundant logic and code, which can become a big variable that adds to the overheads of the system resource utilisation. This brings in the challenge of replacing the former with a compiler that adds minimal overheads to the code, and ensures that it aides in optimising the logic that is implemented to avoid wastage of resources,” says Satish Mohanram, business development manager, National Instruments, India.

If the prototyping stage gets extended. Generally speaking, any task which is repetitive consumes considerable resources. An example of this would be prototyping. Any new product needs to be tested in a real-world environment to ensure the product meets design requirements—such as to test product survival across a range of extreme climatic conditions. The test also needs to ensure that the product does not undergo mechanical failure over its expected lifetime. But in the absence of effective simulation tools, the process of prototyping may get prolonged and this in turn can lead to increased cost of experimentation.


If attained, resource optimisation can lead to a significant and sustainable reduction in the project duration and the number of design iterations needed to identify bugs or defects

If the design is incomplete. Another area that can lead to significant wastage of engineering resources is when design specifiations are incomplete at the beginning of the design cycle, or change substantially during the design cycle. “Sometimes, even when the designs are successfully completed the resource utilisation is sub-optimal because the engineers are able to optimise only at the sub-system or component level,” explains Arun Mulpur, manager, signal processing and communications product marketing and communications, electronics, and semiconductors industry marketing, Math Works, Inc., USA.

If the design is not validated. Most problems occur because design choices haven’t been validated earlier enough. As a result, design errors or inconsistencies remain undetected until late in the design cycle, and lead to significan delays due to rework and repetition of major phases of the system’s design.


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