“Optics may allow interconnects to continue to scale to match the processing ability of future electronics chips, though very low-energy optoelectronic devices and novel compact optics will be needed.”

—David A.B. Miller, Fellow IEEE

The performance of silicon CMOS chips is improving because of reduction in the feature size of integrated circuits. We discuss here the current performance and future prospects of interconnection to high-speed VLSI silicon CMOS chips.

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What is interconnect?
Electrical interconnection is a medium through which electrical signal propagates from source point to the destination point. In the current scenario, most chips are made by using interconnect wire. By using interconnect wire we can integrate many circuits or devices so that the signal can propagate from one device to the other devices.

Interconnect is made by using circuits like MOSFET and BJT, or electrical parameters like resistance (R), capacitance (C), inductance (L) and conductance (G). Using electrical interconnect leads to some problems as the wires are connected through the devices. The major problems are low capacity and density, very high power dissipation, induced crosstalk noise, delay and bandwidth problem, and timing uncertainty. This is because of the coupling capacitance generated between coupling nodes of two interconnect networks.

Fig. 1: High-speed SiGe CMOS technology to integrate analogue and digital on a single c
Fig. 1: High-speed SiGe CMOS technology to integrate analogue and digital on a single chip

The basic general structure of on-chip interconnects is shown in Fig. 2(a). It shows electrical components such as R, L and C in a block connected to another block, making the interconnection system. In a single CMOS silicon chip there are many interconnect wires but these are placed a minimum distance apart.

In Fig. 2(b), the effect of coupling capacitor between the two networks is shown. Minimum feature size of the devices increases coupling between the coupling nodes of the two interconnect lines. Consider the situation in Fig. 2(b) where the input of an inverter is close to an interconnecting line. A parasitic coupling capacitance (CC) exists between the two, so applying a voltage pulse to one line will cause a change in the voltage in the other.

There are three types of interconnects: local, semi-global and global. Local interconnects have a delay of less than one clock cycle, while global interconnects typically take longer than one or two clock cycles. Local and global interconnects are used for short-distance communication. But for long-distance communication, electrical interconnects (local and global) fail to give a good result. So the performance is increased by using a newer technology called ‘optical interconnect.’

Interconnects may be classified as ‘off-chip’ interconnect and ‘on-chip’ interconnect. Off-chip interconnects deal with interconnection of wires between two and more external devices and circuits. On the other hand, on-chip interconnects deal with interconnection of wires into the internal circuitry of one particular chip. Here, in this article, we will discuss only on-chip interconnection.

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In the current scenario the performance of electrical interconnects has been improved by changing the technology used to fabricate the wiring layers on silicon CMOS chips.

What is optical interconnect?
Optical interconnect is a medium through which the signal flows in the form of optical rays (light), the medium being an optical fibre, waveguide, etc. Optical wires are capable of much higher bandwidth of 10 Gbps to 100 Gbps. If we talk about the scaling process in VLSI system—reduction in the feature size of transistors—performance of the wire used for electrical interconnect has not improved significantly because of induced noise, delay and high power dissipation. So to improve the performance of the system, we will have to make the silicon CMOS circuit’s performance much better than the electrical interconnect’s. Optical interconnect has the solution to these limitations and can be used for communication between future CMOS circuits.

As shown in Fig. 3, first the electrical signal is converted into an optical signal by using an optical modulator imposed by laser or any optoelectronics device like LED or photodiode. The signal propagates through the optical cable using waveguide. At the receiver side, the photodetector receives the optical signal and converts it into an electrical signal and amplifies.

By using optics many physical problems related to interconnects can be solved. Optics may solve design problems such as crosstalk noise, bandwidth, isolation and impedance matching, and also reduce problems associated with long-distance communication.

Need for optical system
Two important parts of an on-chip optical interconnect are optical devices called ‘optoelectronics devices’ and optical system called ‘medium.’ Here we discuss some basic requirements of an optical system for on-chip optical interconnects. There are two broad categories of the optical system: ‘guided-wave’ optical system and ‘free space’ optical system.

Fig. 2(a): General structure of interconnects
Fig. 2(a): General structure of interconnects
Fig. 2(b): Effect of coupling capacitor between two interconnect lines
Fig. 2(b): Effect of coupling capacitor between two interconnect lines
Fig. 3: Block diagram of optical interconnect
Fig. 3: Block diagram of optical interconnect

 

For guided-wave optical system, one can use a thin optical fibre cable, waveguide etc. An optical fibre having a diameter of up to 10 µm can be used for on-chip optical interconnect. It has many advantages over other devices such as:
1. No crosstalk inside the optical fibre cable
2. Higher bandwidth, therefore it can operate at a higher data rate
3. Reduced loss due to signal attenuation
4. Small size and light-weight

In waveguide approach, one has to use a waveguide having a diameter of up to 10 µm for on-chip optical interconnect system. Smaller optical guides of the order of micrometre size should have low enough loss so that the propagation loss does not become a big issue for the chip. So for simplicity we connect the waveguide from the central area to the chip to the edges. Whether such guides could handle the internal on-chip interconnects strongly depends on the architecture.

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The other approach is to use a ‘free space’ system where multiple light beams can go in and out of the chips, usually in the form of arrays. So arrays of beams go into and out of the chip. Free-space approach can easily handle a large number of arrays of beams. So for high resolution and focusing on the scale of micrometre size, we use an ordinary lens. Optical elements are fabricated using lithographic patterning. These can generate very large regular arrays of spots from a single laser beam and implement a variety of quite complex regular interconnection patterns.

Requirement for optoelectronic devices
As shown in Fig. 3, an on-chip optical interconnect system consists of transmitter driver circuit, optical channel and receiver circuit. Here p-i-n photodiodes and metal-semiconductor metal (MSM) photodetectors work as the receiver circuit and vertical-cavity surface-emitting laser (VCSEL) and quantum-well modulator work as the transmitter for optical output. The photodetector in the receiver part converts optical energy into electrical energy. In the next step, this electrical signal is amplified by the amplifier circuit. So MSM photodetector gives a fast response and excellent quantum efficiency.

Optical output devices and transmitter circuits. Quantum-well modulator and VCSEL are important devices for the transmitter of on-chip optical interconnect system. You can also use an LED as the transmitter. It will make the fabrication process easier than with VCSELs and avoid some problems of lasers. We discuss here quantum-well modulator and VCSELs in short.

Quantum-well modulator. These modulators are used in demonstrating actual dense interconnects to and from silicon CMOS chips. They are made in large arrays and require an external beam. This requirement can be considered as an advantage or disadvantage of this system. The external beam is required to generate an array and to separate the incident and reflected beams. So we draw a setup that can easily handle the one-master laser beam. The single-master laser beam can be diffracted into arrays of equal beams by using a diffractive beam generator. Additional master laser beam allows centralised clocking of the entire system. Modulators avoid many of the problems of mode quality, wavelength stability, turn-on delay, power dissipation, etc.

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VCSELs. VCSELs have made progress recently, especially with the advent of an oxide confined structure that promises to lower threshold currents. Compared to quantum-well modulators, VCSELs have seen less use yet in systems with large arrays operating with the silicon circuit.

Photodetector and receiver circuit. Detector is a very important part for the receiver’s performance as it converts optical energy into electrical energy. For an on-chip optical interconnect system, the detector should have a low input capacitance if the receiver circuit is to be kept small with not too large power dissipation. Large capacitances mean more sensitive amplifiers have to be used, which introduce a noise that degrades the performance of the receiver circuit while also increasing the power dissipation.

A better approach for optical interconnect receivers is to make the physical capacitance of the photodetector and its connection to the receiver circuit as small as possible. Small capacitance leads to larger voltage swings for a given optical energy, which leads to better noise immunity and improved gain stages. Smaller capacitance also allows use of small, low-power-dissipation transistors in the input stage. To calculate the total capacitance, you need to estimate the gate capacitance of the transistor with which the detector would be integrated. For 90nm CMOS technology node the gate capacitance of an NMOS transistor per unit transistor width is estimated to be 2 fF/µm, and for the 32nm node the corresponding number is 1.2 fF/µm.

To sum up
We have seen various advantages of the optical interconnect system over the electrical interconnect. Optical interconnects solve many of the problems arising in electrical interconnects due to chip-to-chip delay, crosstalk noise, bandwidth, interconnect wire and system synchronisation. Optics may reduce the power dissipation in clock distribution; global on-chip and off-chip interconnects improve the timing. We have found that optical interconnects have a performance that is competitive with or better than electrical interconnects’ and can scale to future interconnect needs.

In conclusion, optics is very promising for dense interconnects to silicon chips. Overall, electrical and optical interconnects, and the many existing and emerging technologies in optoelectronics and optics integrated with silicon CMOS, are likely to play a substantial role in solving major problems in scaling interconnects for CMOS chips in the coming decades.


Kapil Khare is doing M.Tech in Microelectronics and VLSI Design from NIT, Durgapur, West Bengal. Dr Rajib Kar is an assistant professor in the department of Electronics and Communication Engineering at NIT, Durgapur, West Bengal

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