Electric 9.07: EDA and Circuit Layout Made Easy

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If you are looking for an open source electronic design automation (EDA) software, Electric is one of the highly efficient options. This very-large-scale-integration (VLSI) tool lets you draw schematics and create integrated circuit (IC) layouts digitally. Electric 9.07 is also compatible with hardware description languages like VHDL and Verilog.

The different design technologies

The default library of Electric software consists of most of the components necessary for IC design, supporting different technologies and multiple file formats. The different categories of circuits that Electric can design include a complementary metal-oxide-semiconductor (CMOS), n-channel MOSFETs, bipolar technologies based on integrated injector logics, newer layout technologies like thin-film, carbon nanotube and photonics, abstract circuits like digital filters, temporal logics and so on. Each design technology comes out on the interface as a collection of components connected with wires.

A major advantage of the software is that the technology describes the technical parameters of the components and wires, like design rules, simulation aspects and graphical descriptions to name a few. Users can also add modules to custom-design the environment with the help of a technology editor.

Electric 9.07 EDA

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Electric EDA

Analysis and synthesis properties

Electric has a strong inventory of analysis and synthesis tools that create the simulation by storing the connectivity and geometry. These include:

Design-rule checking

This tool checks and validates the layout’s design rules compliance and displays spacing errors, notch errors, minimum size errors and other violations. Interfaces like Caliber and Assura can be used to check design rules of external circuits.

Electrical rule checking

The electric rule checker has two functionalities: ensure proper electrical contact and spacing throughout the circuit, and check for antenna rule violations.

Simulation

Electric has an integrated 12-state switch-level simulator called ALS and a built-in IRSIM simulator version that displays waveforms in a separate window and allows users to cross-probe. Electric also supports a number of simulators which have to be attained exclusively, for example, device-level simulators like Spice, switch-level simulators like Silos, Tegas, ESIM, RSIM, RNL, Cosmos and Mossim, and behavioural simulators like Verilog and Fast-Henry.

Generation

Electric has four inbuilt generator technologies:

1. PLA generator, which functions from a library of PLA elements, facilitating customised arrays

2. ROM generator, which builds a ROM layout from a personality table

3. Pad frame generator, which places pad cells around a chip core and wires them together

4. Fill generator, which ensures proper fills during fabrication by placing geometry on relevant layers

Routing

Electric comes with a number of routing modules. The maze router helps in connecting single wires between points, while the sea-of-gates router uses multi-threading to run wires faster. There are two other routers that ensure wires are properly placed. Other than that, the auto-router creates exclusive connections in overlapping regions. The mimic router adds extra wires in situations similar to those when the user runs by hand. The river router connects parallel wires in a channel between cells.

Network consistency checking

Electric adopts graph isomorphism to compare a layout with its equivalent schematic and evaluates the network consistency. It is also able to compare two different versions of a schematic or layout for network consistency checking.

Logical Effort

Logical Effort helps in marking digital logic gates with fan-out information, ensuring optimal speed of the circuit.

VHDL

The VHSIC Hardware Description Language (VHDL) system uses a layout to generate VHDL and compiles the program to netlists of various formats. Then, with the help of built-in simulators, these netlists can be simulated and converted into a layout with the silicon compiler or saved to memory.

Silicon compiler

The netlist created from VHDL is fed to the silicon compiler for placing and routing standard cells.

Compaction

The compactor tool ensures minimal spacing, or compaction, of the circuit by adjusting the geometry along X and Y axes.

Supported file formats

Electric has its own specific format of reading and writing circuitry files. Yet, it supports an exhaustive array of file formats to match compatibility with other EDA tools. File formats include Caltech Intermediate Format (CIF), Calma Interchange Format (GDS II), Electronic Design Interchange Format (EDIF), LEF and DEF formats, DXF autoCAD format, VHDL and Verilog languages, schematic capture packages like EAGLE, PADS, EDAD and SUE, and finally, printing formats like PNG, PostScript and SVG.

In a nutshell

Electric is an open-source GNU project undertaking. Coded in JAVA, this software can run on the majority of platforms. Electric is a simple and compact EDA tool with a large repertoire of facilities that can be put to best use.

Download the latest version of the software


 

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