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Location: Bengaluru
Company: Intel
Job Description
Develops, maintains, and ensures quality assurance of process design kit (PDK) collateral is the primary responsibility. Developing the custom design methodologies and integrating the PDK in the Design flows is the core job function. EDA tool / Flow integration with PDK, documenting the PDK contents is also expected out of this role. Develops automation of QA flow methodologies for specific technology nodes to scale up QA coverage. Documents and monitors QA results. May include developing test patterns to qualify the design rules and collaterals for correct implementations. Collaborates with silicon design, process engineering, and high-volume manufacturing teams to identify new process technologies and ensure new solutions are high quality and ensure ease of use for both internal and external design communities. Works with EDA vendors on tool improvements to enhance performance and add functionality.
Qualifications
B.E./B.Tech/M.Tech with 3+ Years relevant experience in custom layout design methodology. Must have worked on virtuoso and/or custom compiler platform. Experience on oa_techfile/pcell/pycell development and understanding of cdf parameters and callbacks. Prior experience in handling EDA tools is added advantage. Candidate should be proficient in automation using Cadence SKILL/tcl/perl/python and other scripting languages. Candidate should be flexible to work on different aspects of PDK deliverables. Good in written and verbal communication skills.
