Wednesday, December 18, 2024

Senior Digital Design Engineer At Microchip

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Location: Chennai and Ireland

Company: Microchip

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The Automotive Information Systems (AIS) BU of Microchip is building a highly skilled R&D group in Cork focusing on Analog, Digital and Communications areas. AIS has a broad portfolio of automotive networking products and has been a leader in the automotive space for more than 20 years.

AIS develops networking and related ICs for a broad range of applications ranging from 10 Mbps to 12.5 Gbps speed grades. AIS products are found in more than 250 car models. In addition to the automotive industry, AIS has several products in industrial market.

AIS has a global presence with teams in multiple locations. The AIS team in Cork will be working on low power networking ICs which will involve communication systems, analog and digital expertise. The products from Cork Design Centre team will be addressing the automotive and industrial markets. AIS has been a leader in several new technologies over the last 20 years and has been providing long lasting products in the rigorous automotive market. We place great emphasis on working right first-time design methodology and delivering on schedule.

What will you do in this position?

Reporting to the Digital Design Manager you will be part of the Digital IC Design team in the Automotive Information Systems group as a Digital Design Engineer. Your primary role is to design and implement RTL for digital IC products and conduct post-silicon bring up activities.

This position will expose you to the challenging world of embedded controller design in automotive information and serial communication systems. You will be able to contribute to core research, state of the art technology development and project execution.

Job Duties and responsibilities

  • Architecture and development of digital blocks in digital ASIC products
  • Knowledge in Integrated Circuit (IC) development flow
  • RTL design implementation
  • Block and chip level simulation
  • Synthesis, definition of synthesis constraints, Static Timing Analysis
  • Pre-Silicon FPGA Design Emulation
  • Participate in for post silicon bring-up, support product validation and ATE test development
  • Design documentation to complete block-level micro architecture specification

Requirements/Qualifications

  • 7+ years of experience in digital IC design with experience in taking projects from architecture to mass production.
  • Experience in RTL coding, simulations, synthesis and timing closure.
  • Experience in defining micro-architecture for blocks, identifying and resolving implementation hurdles for robust IC design.
  • Experience in FPGA implementation and board design is a strong advantage.
  • Experience with post-silicon bring up and validation is a strong advantage.
  • Excellent documentation skills and technical presentation skills.
  • Strong analytical skills, individual contributor as well as team player, and excellent communication skills.
  • Ability to work efficiently with global teams and across different cultures is essential.
  • Understanding and experience in different communication protocols is a strong advantage – e.g. Ethernet, USB, I2C, I2S, SPI.
  • Strong digital communication system background with familiarity of DSP algorithms and Matlab is a strong advantage.
  • Understanding and experience in digital filter design and implementation is a strong advantage.
  • DPLL, Sigma-Delta modulation design experience is a strong advantage.
  • Advantageous if you have the following – DPLL, Sigma-Delta modulation design experience is a plus.

Essential Skills

  • Decision-making, problem resolution and resourceful thinking skills.
  • Highly energetic, motivated and self-starter.
  • Willing to work in an environment that allows initiative and requires flexibility.

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