Requirements
FPGA Design and Verification/Validation Engineers
No. Of Positions: 6
Experience
RTL Design 2+ Years
IP Verification: 2+ Years
IP Design/ SOC Design: 4+ Years
FPGA Design: 6+ Years
Job Description
Independent In-charge of the FPGA Design Blocks
Required Skill Sets
Experienced with any one of the Interfaces such as:
- PCIe 2.0, SATA, Fiber Channel, 1G/10G BASE
- MII/RMII/GMII/RGMII/SGMII/XAUI,RXAUI,
- SDI- SD/HD/3G , Display Port , USB, JESD204B, SRIO,
- MIPI, DDR/LPDDR/DDR2/DDR3, QDR memories
Preferred Skills
- Hands on Experience on Design and Debugging.
- Should had worked on projects based on FPGAs, SOC
- Domain Knowledge: SOC, Hi Speed Interfaces
Location: Bengaluru
Company: Dexcel Designs
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