Analog/MS engineer will be a part of our multi-disciplinary millimeter-wave design team and will support the team for analog/mixed-signal implementations on our millimeter-wave SoC’s. The responsibilities include, but not limited to, designing building blocks such as various op-amps, biasing circuits, references, LDO’s, PLL’s, simple data converters, etc. Analog/MS engineer will have a critical role in developing innovative circuit blocks that will support various features in our 5G and Satcom front-end chips. This is a unique position at the intersection of millimeter-wave applications and analog/MS implementations.
Responsibilities
- Work independently to develop innovative and differentiating circuits and topologies for challenging engineering problems at the intersection of millimeter-wave and analog/MS design.
- Design analog/MS building blocks such as op-amps, data converters, buffers, IO buffers, and biasing circuits in CMOS and SiGe process.
- Define and design analog line-ups for temperature sensors, power detectors, process monitors, etc.
- Collaborate with the RF design lead and product definer to create digital specification for the digital design team elaborating on interface protocols, register map, state machines, etc.
- Lead the RF-digital integration by collaborating with digital designers for complex and creative digital control and calibration interfaces for millimeter-wave SoC’s. Function as a gatekeeper between millimeter-wave and digital designers.
- Lead the analog-mixed signal (AMS) verification effort.
- Interact with other analog/MS design divisions within Renesas and offer creative solutions to application specific challenges for the millimeter-wave team.
Requirements
- 7+ years of experience in analog/MS circuit design in CMOS and/or SiGe technologies.
- Solid understanding of op-amps, biasing circuits and references.
- Strong fundamentals in temperature sensors, detection circuits and data converter design.
- Extensive experience in mixed signal simulations and layout.
- Proficient in Cadence Virtuoso suite – Schematic, Layout XL, and Spectre/AMS simulations.
- Working understanding of Verilog based RTL, and digital design flow.
- Motivation to work in a multi-disciplinary team for SoC development.
- Good communication skills and effective team work.
- Extensive experience in analog/mixed signal design characterization. Knowledge of MATLAB, Python is a plus.
Preferred Skills
Broad range of working knowledge on digital design and verification flow.
Education and/or Experience
- 7+ years industry experience with MSEE required.
- 5+ years industry experience with PhD preferred.
Location: Bengaluru
Company: Renesas
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