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Location: Bengaluru
Company: Broadcom
Job Description
- Contribute/Lead towards Design and Development of Single/Multiport SRAM, Register file compilers in 16FF/7FF/5FF/3FF Technologies
- Circuit design/simulation of key components such as bitcell, WL decoder, ​Sense Amplifier​, Column decoder and control logic.
- Development of critical path and characterization flow to perform detailed margin and characterization simulations​ of the designs​.
- Statistical Analysis of Bit-Cell​, ​Sense Amplifier and Self Time Blocks for Compiler Target yield Sign-Off
- Design Tuning​/optimizations​, Margin Analysis and Sign-Off for Complete Compiler to meet Yield and Performance targets.
- Logic simulations and detailed timing analysis of key paths in high speed memory design.​
- ​Coordination’s among various team members design team, modeling team, layout team and verification team.
Skill Sets Needed
- Expertise of high speed/low power CMOS circuit design , clocking scheme, Static and dynamic logic circuits
- Experience in Designing and Driving one or many Memory Compilers Specifications to final release
- Complete hands on experience in using Cadence/Mentor schematic/layout editor tools
- Complete hands on experience with Circuit simulation, MC analysis and waveform viewer tools such as HSPICE, HSIM, XA, FinSim, XARA, nWave, ​WV etc
- Experience in Skill/Perl/Python Scripting is a strong plus
- Experience in Understanding the layout design issues and process issues/limitation in FINFET is a Plus
