The choice of ASIC vs FPGA for volume production is on case-to-case basis. However, what if there were a way to get the best of both the worlds?
Dilin Anand
A field-programmable gate array (FPGA) can be purchased off-the-shelf and programmed by the user, whereas an application-specific integrated circuit (ASIC) is manufactured to a customer’s specification. This distinction has not changed since the dawn of both technologies. However, the performance offered by these two technologies, and the economics that go behind them, have changed considerably over the years. The time is ripe to discuss again and see what can be done about this conundrum.
Time-to-market and configurability
The configurability of an FPGA is its most priced asset. Its ability to rapidly implement or reprogram the logic for a specific feature, or to modify the functionality that was previously instilled in it, is why designers run after it.
“Even if a vendor has new features to add at a later stage in the released product, he still has the freedom to decide whether to implement that feature in software or hardware based on applicability. Time-to-market for handling change-requests in FPGA is much less than in ASICs,” explains Manisha Mankar, architect—digital design, Robert Bosch Engineering and Business Solutions.
Indeed, this is one of the primary reasons why designers are opting for FPGAs.
“There are two key factors driving the demand for FPGAs today: The programmable imperative, i.e., the inherent capability of an FPGA that allows it to be tailored to the needs of the customer and the insatiable bandwidth requirements of the mobile generation today. Given this, FPGAs are increasingly replacing ASICs and ASSPs for more and more applications across different verticals such as telecommunications, aerospace, medical, automotive and industrial to name a few,” adds Neeraj Varma, director-sales, Xilinx India.
Of course, an FPGA would not be able to achieve the smaller form factor, lower power consumption or lower unit cost of a similarly functioning ASIC.
Performance and power efficiency
While FPGAs used to be selected for lower-speed, less complex or volume designs in the past, today’s FPGAs easily push the performance barrier. With increase in logic density and other features such as embedded processors, DSP blocks and high-speed serial at low price points, FPGAs are an interesting proposition. The industry has shown that high-end FPGAs are growing in volume, handling high-speed applications and complex designs.
Earlier, FPGAs were viable only for prototyping or low-density applications. Now they meet the needs of very high-volume applications such as consumer products and other moderate-volume high-density appli-cations as well.
Vijayakumar Regupathi, architect-digital design, Robert Bosch Engineering and Business Solutions, adds, “FPGA devices now look like system-on-chips (SoC) with embedded processors, signal processing block, embedded memory interface controller, multi-gigabit transceivers, improved performance and a broad choice of IPs available from FPGA vendors and/or third parties.
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While an ASIC may consume more power per unit die size than an FPGA, the power is normally amortised over a higher density solution, which provides better power efficiency
— Manisha Mankar, Architect-Digital Design, Robert Bosch Engineering and Business Solutions
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With this advantage, short design cycle and reconfigurable options, FPGAs are pushing ASICs out of the market.”
The fact that ASICs are built for specific applications allows them to have a very high density of useful logic gates on the chip and use resources optimally. Hence higher gate count and lower power consumption give ASICs a competitive edge over FPGAs.
“All the internal structures/IPs are used for customer-specific or mission-specific applications or functions. So, while an ASIC may consume more power per unit die size than an FPGA, power is normally amortised over a higher-density solution, providing better power efficiency,” adds Mankar.
Finally, high-volume production
Generally, ASICs are deemed to be the best option for high-volume production.
“If you are really looking for high volumes, FPGAs are out of the game. The cost and performance advantages that you get out of ASICs definitely tilts the balance towards ASICs. FPGAs come into the play when volumes are small and time-to-market is critical. Also, the clock speed is limited in FPGAs. So for high-volume or cost-sensitive applications, ASIC is probably the way to go,” says Milind Gandhe, associate vice president, Semiconductor Business Line, SASKEN.
There is, however, a catch. “The choice of ASIC vs FPGA for volume production is on case-to-case basis. In mobile applications, it makes more sense to have an ASIC-based solution due to the requirement of high density/performance. Time-to-market is also a parameter in such consumer applications. With newer shorter ASIC development cycles, and with less focus on quality, ASICs are the logical choice. On the other hand in network applications, where typically the requirement is moderate in terms of complexity and density, FPGA solutions are preferred due to shorter time-to-market. Quality could be addressed through flexibility in soft-hardware bug fixes,” explains Regupathi.
[stextbox id=”info” caption=”Myth Buster: Can FPGAs scale to speeds required by today’s Internet?”]“There are skeptics in the industry who feel that FPGAs cannot match the speed requirements of today’s applications such as Internet routers. However, with changing economics and performance enhancement, FPGA technology is seeking a place to address complex applications. As examples, we do see companies shipping line-rate, high-performance routers using FPGAs,” says Vijayakumar Regupathi, architect-digital design, Robert Bosch Engineering and Business Solutions. FPGAs in this context act as a programmable network processor.[/stextbox]
“Generally, for lower production volumes, FPGAs may be more cost-effective than ASICs. But the recent trend suggests that FPGAs could be a better alternative in high-volume applications since costs related to ASIC development are increasing on account of more complex technology nodes. However, at this juncture, it is not very clear whether this trend is sustaining or a temporary aberration,” adds Mankar.
For high-volume production, costs associated with building a custom ASIC chip are said to be increasing, especially since technology nowadays is ever more complex. As we move towards advanced nodes, cost considerations multiply exponentially. For instance, the development cost for ASIC at 28nm is 40 per cent more than at 40nm. At 20nm, it is estimated to be 70 per cent over that of 28nm.
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The cost and performance advantage that you get out of ASICs definitely tilts the balance towards ASICs. FPGAs come into play when volumes are small and time-to-market is critical. So for high-volume or cost-sensitive applications, ASIC is probably the way to go
— Milind Gandhe, Associate Vice President, Semiconductor Business Line, SASKEN
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“As a result of the prohibitive costs in building custom chips, the ASIC and ASSP industry is seeing much less design starts than a few years ago. This is forcing them to narrow down to ultra-high-volume applications like mobile phones, PCs and video games where the investments can be justified. Other areas where custom chips are still prevalent and needed are where you need significant mixed-signal capabilities. Today, FPGAs are able to serve the vast majority of the rest of the high-volume market segments and applications. Xilinx is routinely shipping millions of its low-cost FPGA units to customers in high-volume consumer applications like flat-panel and 3D TVs,” adds Varma.
Best of both the worlds
While FPGAs are excellent for designing and prototyping digital logic into medium-volume, medium-density applications, their high unit cost makes things difficult. On the other hand, the low unit cost of ASICs is one of the main reasons why these are considered for high-volume manufacturing.
What if there were a way to get the best of both the worlds? Well, designing a new product around FPGA allows design modifications to be quickly made throughout the development process. Once this design is complete and approved for production, the FPGA design can be migrated to an ASIC design and then produced, cutting the production unit cost greatly.
“The low non-recurring engineering charges associated with a midrange ASIC solution coupled with a much lower unit cost make this strategy a powerful tool in achieving low overall costs, giving users a competitive cost advantage in the market,” explains Terry Danzer, digital ASIC product marketing manager, Applications Product Group, ON Semiconductor.
To optimise the migration process and ease it forward, Danzer suggest several things that can be considered during the initial design flow: “Careful selection of IP early during the design phase is essential. In addition, developing the FPGA and ASIC in a parallel design flow will help to speed up the process. Finally, planning for portability to an ASIC from the beginning of the project will help to speed up time-to-market and decrease costs. Good design practices such as the use of synchronous design techniques will enable the design to be ported across many different technology platforms. Finally, one of the most important things a design team can do is have good documentation of the design. With a little time and effort spent in the early stages of the design, the migration will require minimal engineering resources. The migration can result in a drop in replacement parts. For additional cost reduction, the design can be ported to less expensive technology nodes and/or packaging.”
