Sunday, December 22, 2024

Revolutionising Chip Design With Advanced EDA Tools

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Empowered by EDA tools, Tachyum’s Prodigy Universal Processor reshapes chip design by bridging conceptual gaps, enhancing efficiency, and unveiling exceptional chip specifications.

192 core Prodigy Processor Tachyum Chip CPU TPU GPU AI Supercomputing processor (Photo: Business Wire)
192 core Prodigy Processor Tachyum Chip CPU TPU GPU AI Supercomputing processor (Photo: Business Wire)

Electronic Design Automation (EDA) tools are instrumental in the intricate chip design process, bridging the gap between conceptual design and physical realisation. By automating and optimising various design tasks, these tools play a pivotal role in determining the efficiency, performance, and feasibility of semiconductor devices.

Tachyum has announced that by employing new EDA tools during the physical design phase of their Prodigy Universal Processor, they achieved better chip specifications than expected. This improvement came after a successful shift in their physical design tools, notably in expanding Prodigy cores to 192.

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After completing the Register Transfer Level (RTL) coding, the team transitioned to Prodigy’s physical design phase, encompassing the placement of transistors and wires. Replacements in Intellectual Properties (IPs) necessitated updates to RTL simulation and physical design tools. Leveraging new EDA tools, they elevated core count by 50%, Serializer/Deserializer (SERDES) from 64 to 96 per chip. The die size slightly increased, expanding from 500mm2 to 600mm2, to accommodate these enhanced physical capabilities. Furthermore, the Level 2 and Level 3 (L2/L3) cache of the chip was augmented from 128MB to 192 MB. In addition, Double Data Rate 5 (DDR5) 7200 memory support was integrated alongside the pre-existing DDR5 6400. The chip’s speed improved with 1 Dual In-line Memory Module (DIMM) per channel. The larger package design was adapted to facilitate an extra 32 serial links and connect with as many as 32 DIMMs to a single Prodigy chip.

The patented Prodigy architecture is a universal processor, effortlessly transitioning between standard Central Processing Unit (CPU) tasks and Artificial Intelligence/Machine Learning (AI/ML) responsibilities, making it adept at training and inference. This flexibility is pivotal in the banking sector, where AI/ML tools are integral in preemptively identifying fraud and cyberattacks, ensuring financial security. Prodigy sets a benchmark in data centre efficiency, drastically cutting both Capital Expenditure (CAPEX) and Operational Expenditure (OPEX). Its dual capability to handle high-performance and standard business applications means Prodigy-equipped servers can nimbly adapt to varying workloads. This eliminates the need for dedicated AI hardware, significantly boosting server utilisation. 

Having reached this significant milestone with Prodigy, Tachyum’s immediate focus lies in finalising the substrate package and socket design to facilitate additional SERDES lines.

Nidhi Agarwal
Nidhi Agarwal
Nidhi Agarwal is a journalist at EFY. She is an Electronics and Communication Engineer with over five years of academic experience. Her expertise lies in working with development boards and IoT cloud. She enjoys writing as it enables her to share her knowledge and insights related to electronics, with like-minded techies.

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