AMD launches a system on chip (SoC) platform while enhancing data movement and memory capacity to meet next-generation workload demands.
AMD, USA has introduced the ‘versal premium series gen 2′ which is a high-performance adaptive system on chip (SoC) platform for data processing across diverse industries. The gen 2 series, marking the first field-programmable gate array (FPGA) devices to feature compute express link (CXL) 3.1, PCIe Gen6, and LPDDR5X memory support, is designed to accelerate data transfer speeds and improve system efficiency for data-intensive applications.
The inclusion of CXL 3.1 and PCIe Gen6 establishes the platform as a leading choice for industries where high-speed data movement and efficient memory utilisation are critical. These advancements target markets such as data centres, aerospace, communications, and defence, where the demand for rapid real-time data processing continues to grow. Salil Raje, senior vice president and general manager, adaptive and embedded computing group, AMD remarked, “Our latest addition to the Versal Gen 2 portfolio helps customers improve overall system throughput and utilisation of memory resources to achieve the highest performance and unlock insights for their most demanding applications from the cloud to the edge.”
With sturdy support for both CXL 3.1 and PCIe Gen6, the SoC platform delivers a significant enhancement in host connectivity, providing a 2-4X faster line rate over competitive FPGAs with PCIe Gen4 or Gen5. By pairing these SoCs with the company’s EPYC CPUs, system architects can achieve high-performance CPU-to-accelerator connectivity to manage heavy workloads more effectively and meet the increasing demand for data processing. Additionally, CXL 3.1’s improved fabric and memory coherency capabilities enable more fluid data sharing across diverse computing environments.
The Gen 2 platform’s compatibility with LPDDR5X memory, achieving data transfer rates up to 8533 Mb/s, delivers an impressive 2.7X faster host connectivity than previous-generation LPDDR4/5 memory. This bandwidth boost is crucial for applications requiring vast data access, supporting multiple accelerators through scalable memory pooling and maximising data movement without the need for additional switches. CXL memory expansion modules further increase total bandwidth, which optimises system memory utilisation and capacity, particularly valuable for multi-device operations.
Security features are paramount in the SoC platform, with AMD incorporating the industry’s first FPGA-based PCIe integrity and data encryption (IDE) in hard IP to ensure data protection during transit. The integrated DDR memory controllers offer inline encryption to secure data at rest, while 400G high-speed crypto engines facilitate secure, fast data transactions, an asset in industries with strict security standards.
The company expects to release development tools for the versal premium gen 2 by Q2 2025, with silicon samples available in early 2026 and production beginning in late 2026, providing companies a path to enhanced data processing and storage solutions for their most demanding applications.
