New design guidelines SMARC 2.1.1 help developers find relevant information for designing their SMARC carrier boards.
SMARC (Smart Mobility ARChitecture) is a specification published by the Standardization Group for Embedded Technologies e.V. (SGET) – a technical consortium hosting and developing specifications for embedded computer technology. SMARC is a small form factor computer-on-module designed for applications that require low power, low costs, and high performance. SMARC modules are based on ARM processors but they can also use other low power SOCs and CPUs, such as tablet oriented x86 devices and other RISC CPUs. The core CPU and support circuits, including DRAM, boot flash, power sequencing, CPU power supplies, Gigabit Ethernet and dual channel LVDS display transmitter are integrated in a module making it suitable for portable and stationary embedded systems.
The SMARC computers use a modular approach and are used with application specific Carrier Boards that implement other features such as audio CODECs, touch controllers, wireless devices, etc. Therefore, a guideline that provides detailed information on a framework of SMARC module and carrier board designs is necessary.
SGET e.V. has released a new design guide for its latest SMARC 2.1.1 specification. It offers embedded systems developers comprehensive design guidance for SMARC based carrier boards and now covers all features and interfaces that were implemented with the recent SMARC specification update. The new specification gives designers freedom with regards to SerDes signaling over PCIe for Gb Ethernet, as well as full USB-C support offering USB 3.2 Gen1 and DisplayPort Alt Mode over one single USB interface.
For utilizing new technologies and modules to their full potential, information such as module pinouts, sufficient software details, etc. must be well documented. Quality guidelines make way for new innovations and upgrades in their respective technologies. The new SMARC Design Guide 2.1.1 aims to standardize the highly fragmented and proprietary COM market for Arm based processor technologies.
“New technologies and interfaces require guidance on how to implement them on SMARC carrier board designs,” explains Martin Unverdorben, SMARC Module Team Chairman.
“Besides working on the feature implementation and high speed interface layout recommendations we also put great emphasis on the readability and layout of the design guide to make it simpler for developers to find the information they need to design their SMARC carrier boards,” adds Carsten Rebmann, editor of the SMARC design guide.
What’s new in the design guide
The SMARC Design Guide 2.1.1 includes a new chapter on SerDes implementations and provides more examples for fully featured USB-C implementations, including DisplayPort Alt Mode as well as updated and extended options for display interfaces. Furthermore, the chapter on module power has been optimized to provide better explanations of the power up process and the four separated power domains. New chapters have been added on how to implement the RESET_OUT signal and for demonstrating the higher influence of via stubs through high speed signals and added via loss simulations. New considerations for SPI and eSPI topology round off the enhancements.
The new SMARC Design Guide 2.1.1 can be downloaded at: https://sget.org/standards/smarc
