Saturday, November 16, 2024

Revolutionary Memory Technology Transforms AI Data Centers

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With the debut of its industry-first HBM3 Gen2 memory, Micron Technology boasts unmatched speed, capacity, and energy efficiency. 

HBM3 Gen2

Micron Technology has launched the industry’s first 8-high 24GB HBM3 Gen2 memory, featuring bandwidth exceeding 1.2TB/s and pin speed surpassing 9.2Gb/s. This marks a notable enhancement of up to 50% compared to presently available solutions. With a 2.5-fold increase in performance per watt compared to earlier iterations, the HBM3 sets new records for critical artificial intelligence (AI) data centre measures such as performance, capacity, and power efficiency. These enhancements expedite training extensive language models such as GPT-4, optimising AI inference infrastructure and establishing an unparalleled total cost of ownership (TCO) superiority. The high-bandwidth memory (HBM) solution is rooted in its 1β Dynamic Random-Access Memory (DRAM) process node. This allows the assembly of a 24Gb DRAM die into an 8-high cube, fitting standard package dimensions.

Micron will debut a 12-high stack with a 36GB capacity, surpassing competitors by offering 50% more capacity for the same stack height. Key advancements, such as doubled through-silicon vias (TSVs), a fivefold increase in metal density, and a power-saving data path design, fuel HBM3’s remarkable efficiency. Addressing the surge in AI demands, HBM3 Gen2 memory reduces training times for substantial language models by over 30% and enhances trained model efficiency. The superior performance also results in significant cost savings for AI data centres.

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“Micron’s HBM3 Gen2 technology was developed with a focus on unleashing superior AI and high-performance computing solutions for our customers and the industry,” said Praveen Vaidyanathan, vice president and general manager of Micron’s Compute Products Group. “One important criterion for us has been the ease of integrating our HBM3 Gen2 product into our customers’ platforms. A fully programmable Memory Built-In Self Test (MBIST) that can run at the full specification pin speed positions us for improved testing capability with our customers, creates more efficient collaboration, and delivers a faster time to market.”

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Nidhi Agarwal
Nidhi Agarwal
Nidhi Agarwal is a journalist at EFY. She is an Electronics and Communication Engineer with over five years of academic experience. Her expertise lies in working with development boards and IoT cloud. She enjoys writing as it enables her to share her knowledge and insights related to electronics, with like-minded techies.

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