Thursday, March 28, 2024

“Multi-chip packaging, 3D ICs emerging trends”

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Going forward, there are other capabilities that can be used to allow the industry to continue lowering the cost per transistor. One trend that is emerging today is multi-chip packaging, enabling us to pack more and more transistors in a package as opposed to on the chip. That will become increasingly true in the future. Another promising approach is 3D integrated circuits. This is especially interesting for memory intensive applications, where there is a need for high speed interactions between memory and the processing unit which also impacts performance and power dissipation significantly.

Q. What are the other challenges that the EDA industry will likely face?
A. Low power design at higher levels is a pressing challenge. Architectural choices made in the front end of design have the most significant impact on power consumption. In addition, the speed of simulation is orders of magnitude faster at the system level. But assessing power at this abstract level traditionally has been extremely difficult to do with any degree of accuracy.

Fortunately, advanced design tools are emerging that provide accurate power modeling early in the design flow where architectural tradeoffs can easily be made. This will enable designers to explore more alternatives for applying the most efficient power strategies.

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In the area of functional verification, the explosion in the complexity of verification continues to be a formidable challenge for EDA. As designs expand in size and complexity, simulation runs cannot reach effective coverage within a reasonable amount of time. To keep on schedule, designers are being forced to either lower their coverage goals or change methodologies. Changes ESL (electronic system level), coverage based verification, emulation, hardware acceleration of test benches and assertion-based verification.

One of the most promising new methodologies is intelligent testbench automation that removes redundant simulation, giving top priority to running each unique test first. This results in achieving target coverage linearly, leaving more time for running random tests, or even expanding the test space to previously untested functionality.

Emulation is also evolving to address the growing complexity of system design and the increasing need for hardware/software co-verification. While traditional ‘in-circuit emulation’ is still used, the trend of leading edge users is toward acceleration of test benches, or co-modeling, virtual IP stimulus (rather than plug-in hardware) and software debug for dozens of simultaneous users.

As a result, emulation can be set up as a typical IT server farm, with users remotely accessing the portion of the emulator capacity they need. The cost per cycle of emulation is two to three orders of magnitude lower than simulation on a traditional server farm. A large, and increasing, share of emulation deployment is in systems companies, who are using emulation to both debug multi-chip systems and to develop and verify embedded software.

Another challenging area is embedded software. The cost of designing hardware has actually not increased much over the last twenty years, according to the ITRS roadmap and Gary Smith EDA.

What has increased is the cost of system engineering and embedded software development. The enablement software for the SoC (drivers, Linux, light weight executives, etc), is becoming the bottleneck in the release process.

Ideally, the SoC design process would enable embedded software development ahead of silicon. But that’s not as easy as it sounds. First, the virtual representation needs to run sufficiently fast. Second, an environment that is native to the software development team needs to be established, trying to train the embedded software team on the use of hardware design tools is a non-starter. The solution that is emerging is a single embedded software development environment that is the same whether the target is a simulation, emulation, prototype or final product. Popularity of this kind of environment is growing rapidly.

For example, Mentor’s Sorcery Codebench, which is built upon the GNU open source tool chain for cross development of Linux, RTOS and bare-metal based embedded systems, is experiencing more than 20,000 downloads per month.


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