Sharing interesting observations on a project on emulating the EEPROM inside the flash memory to store specific data before shut-down, Nistor flavin, a hardware developer from Continental, says, “first of all, if you have a cache memory, you can’t use it any more or you have to use the memory management unit (MMU) settings to make that area non-cacheable. The read time is small compared to the erase time.”
He explains, “for this, you have to use two memory blocks—one active and the other blank—in order not to erase a block every time you want to update a byte (you will need to erase the block only when it is full). If the software is done in a good way (keeping track of all steps), even if you shut down the system during an erase operation, no problem should appear.”
The road ahead
The flash memory has been the work-horse of embedded systems. However, device manufacturers have been on a constant endeavour to eliminate its major drawbacks like block-only erasability, slow erase times and limited erase/write cycles (which limits its life as a data storage device).
[stextbox id=”info” caption=”Flash Memory Vendors”]• Samsung
• Toshiba
• Hynix
• Atmel
• Intel
• Micron
• Numonyx
• PowerChip
• Spanion
• Macronix International[/stextbox]
Ashish Gupta, R&D group leader, The Learning Labs, says, “One such technology which addresses these concerns is the phase-change memory (PCM). It works by taking advantage of the alter-able physical and electrical properties of certain materials in order to store information on a memory device.”
PCMs are being designed to keep the hardware interface (both in the case of SPI based and parallel data bus based devices) similar to the traditional flash memory devices. The software interface (command codes for performing various functions like program, erase and read the device ID) is being designed to be very similar to existing flash memories. Hence migration of existing designs is easier.
Gupta claims, “These may or may not be at the right price point yet, but surely the future seems bright.”
PCM-based devices are already available in the market. Listing the benefits of the PCM technology, Gupta says, “Bit alterability, which is the ability to change each memory bit independently from 0 to 1, or 1 to 0, without an intervening ‘block erase’ operation, significantly reduces software overheads.”
This technology offers a higher endurance. That is, an increased number of write cycles (of the order of 1,000,000, as claimed in the datasheet) reduces the need for wear-levelling algorithms employed in flash file systems like the journaling flash file system. It has faster access speeds that offer faster erase cycles and faster write cycles. Also, no sector-erase is needed for programming.
To conclude
Flash memories have proven their benefits in both code storage and data storage. However, like any other semi-conductor device which is programmable and erasable, it is important to understand their physical parameters. for data retention, data integrity, endurance and reliability of the application, the datasheets and design specification must be studied carefully. Verification codes and other software codes can be used to check the flash contents.
Today, on-chip flash has replaced the EEPROM in applications that need to store configuration data during power-down and power-up cycles. Looking forward, memory vendors are trying to commercialise a next-generation technology that can combine DRAM and NAND together.
The author is a senior technology journalist at EFY
